AS4C4M4E1Q-60TC 参数 Datasheet PDF下载

AS4C4M4EOQ

AS4C4M4E1Q

®

Logic block diagram for 4K refresh

V

CC

GND

Refresh

controller

Column decoder

Sense amp

Data

I/O

buffers

I/O0 to I/O3

RAS

RAS clock

generator

CAS

CAS clock

generator

WE

WE clock

generator

A0

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

OE

Address buffers

Row decoder

4,194,304 × 4

Array

(16,777,216)

Logic block diagram for 2K refresh

V

CC

GND

Refresh

controller

Column decoder

Sense amp

Data

I/O

buffers

I/O0 to I/O3

RAS

RAS clock

generator

CAS

CAS clock

generator

WE

WE clock

generator

A0

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

OE

Address buffers

Row decoder

4,194,304 × 4

Array

(16,777,216)

Substrate bias

generator

Recommended operating conditions

Parameter

Supply voltage

4C4M4EOQ

AS4C4M4E1Q

4C4M4EOQ

AS4C4M4E1Q

Symbol

V

CC

GND

Input voltage

Ambient operating temperature

†

Min

4.5

0.0

2.4

–0.5

†

0

Nominal

5.0

0.0

–

–

Max

5.5

0.0

V

CC

0.8

70

Unit

V

V

V

V

°C

V

IH

V

IL

T

A

V

IL

min -3.0V for pulse widths less than 5 ns. Recommended operating conditions apply throughout this document unlesss otherwise specified.

3/22/01; v.1.0

Alliance Semiconductor

P. 3 of 16