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AS4C4M32D1A-5BCN 参数 Datasheet PDF下载

AS4C4M32D1A-5BCN图片预览
型号: AS4C4M32D1A-5BCN
PDF下载: 下载PDF文件 查看货源
内容描述: [DLL aligns DQ and DQS transitions]
分类和应用:
文件页数/大小: 64 页 / 2373 K
品牌: ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
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AS4C4M32D1A-5BIN  
AS4C4M32D1A-5BCN  
Addressing Mode Select Field (A3)  
The Addressing Mode can be one of two modes, either Interleave Mode or Sequential Mode. Both Sequential  
Mode and Interleave Mode support burst length of 2, 4, and 8.  
Table 8. Addressing Mode  
A3  
0
Addressing Mode  
Sequential  
1
Interleave  
Burst Definition, Addressing Sequence of Sequential and Interleave Mode  
Table 9. Burst Address ordering  
Start Address  
Burst  
Length  
Sequential  
Interleave  
A2  
A1  
X
X
0
A0  
X
X
X
X
X
X
0
0
0
0
1
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0, 1  
1, 0  
0, 1, 2, 3  
1, 2, 3, 0  
2, 3, 0, 1  
3, 0, 1, 2  
0, 1  
1, 0  
0, 1, 2, 3  
1, 0, 3, 2  
2, 3, 0, 1  
3, 2, 1, 0  
2
4
0
1
1
0
0
1
1
0
0, 1, 2, 3, 4, 5, 6, 7  
1, 2, 3, 4, 5, 6, 7, 0  
2, 3, 4, 5, 6, 7, 0, 1  
3, 4, 5, 6, 7, 0, 1, 2  
4, 5, 6, 7, 0, 1, 2, 3  
5, 6, 7, 0, 1, 2, 3, 4  
6, 7, 0, 1, 2, 3, 4, 5  
7, 0, 1, 2, 3, 4, 5, 6  
0, 1, 2, 3, 4, 5, 6, 7  
1, 0, 3, 2, 5, 4, 7, 6  
2, 3, 0, 1, 6, 7, 4, 5  
3, 2, 1, 0, 7, 6, 5, 4  
4, 5, 6, 7, 0, 1, 2, 3  
5, 4, 7, 6, 1, 0, 3, 2  
6, 7, 4, 5, 2, 3, 0, 1  
7, 6, 5, 4, 3, 2, 1, 0  
8
0
1
1
CAS Latency Field (A6~A4)  
This field specifies the number of clock cycles from the assertion of the Read command to the first read data.  
The minimum whole value of CAS Latency depends on the frequency of CK. The minimum whole value  
satisfying the following formula must be programmed into this field. tCAC (min) CAS Latency X tCK  
Table 10. CAS Latency  
A6  
0
A5  
0
A4  
0
CAS Latency  
Reserved  
Reserved  
2 clocks  
0
0
1
0
1
0
0
1
1
3 clocks  
1
0
0
Reserved  
Reserved  
2.5 clocks  
Reserved  
1
0
1
1
1
0
1
1
1
Confidential  
- 10/64 -  
Rev.1.0 May 2016