4Mx16 DDR1-AS4C4M16D1A
Addressing Mode Select Field (A3)
•
The Addressing Mode can be one of two modes, either Interleave Mode or Sequential Mode. Both
Sequential Mode and Interleave Mode support burst length of 2, 4, and 8.
Table 6. Addressing Mode
A3
0
Addressing Mode
Sequential
1
Interleave
Burst Definition, Addressing Sequence of Sequential and Interleave Mode
Table 7. Burst Address ordering
Start Address
•
Burst Length
Sequential
Interleave
A2
X
X
X
X
X
X
0
A1
X
X
0
0
1
A0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0, 1
1, 0
0, 1, 2, 3
1, 2, 3, 0
2, 3, 0, 1
3, 0, 1, 2
0, 1
1, 0
2
0, 1, 2, 3
1, 0, 3, 2
2, 3, 0, 1
3, 2, 1, 0
4
8
1
0
0, 1, 2, 3, 4, 5, 6, 7
1, 2, 3, 4, 5, 6, 7, 0
2, 3, 4, 5, 6, 7, 0, 1
3, 4, 5, 6, 7, 0, 1, 2
4, 5, 6, 7, 0, 1, 2, 3
5, 6, 7, 0, 1, 2, 3, 4
6, 7, 0, 1, 2, 3, 4, 5
7, 0, 1, 2, 3, 4, 5, 6
0, 1, 2, 3, 4, 5, 6, 7
1, 0, 3, 2, 5, 4, 7, 6
2, 3, 0, 1, 6, 7, 4, 5
3, 2, 1, 0, 7, 6, 5, 4
4, 5, 6, 7, 0, 1, 2, 3
5, 4, 7, 6, 1, 0, 3, 2
6, 7, 4, 5, 2, 3, 0, 1
7, 6, 5, 4, 3, 2, 1, 0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
CAS Latency Field (A6~A4)
•
This field specifies the number of clock cycles from the assertion of the Read command to the first read data.
The minimum whole value of CAS Latency depends on the frequency of CK. The minimum whole value
satisfying the following formula must be programmed into this field. tCAC (min) ≤ CAS Latency X tCK
Table 8. CAS Latency
A6
0
A5
0
A4
0
CAS Latency
Reserved
Reserved
2 clocks
0
0
1
0
1
0
0
1
1
3 clocks
1
0
0
Reserved
Reserved
2.5 clocks
Reserved
1
0
1
1
1
0
1
1
1
Confidential
- 9/54 -
Rev.1.1 July 2015
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
