August 2001
®
AS4C1M16F5
5V 1M×16 CMOS DRAM (fast-page mode)
Features
• Organization: 1,048,576 words × 16 bits
• High speed
- 45/50/60 ns
RAS
access time
- 20/20/25 ns fast page cycle time
- 10/12/15 ns
CAS
access time
• Low power consumption
- Active:
880 mW max (AS4C1M16F5-60)
- Standby: 11 mW max, CMOS DQ
• Fast page mode
• 1024 refresh cycles, 16 ms refresh interval
-
RAS
-only or
CAS
-before-
RAS
refresh
• Read-modify-write
• TTL-compatible, three-state DQ
• JEDEC standard package and pinout
- 400 mil, 42-pin SOJ
- 400 mil, 44/50-pin TSOP 2
• 5V power supply
• Industrial and commercial temperature available
Pin arrangement
SOJ
Vcc
DQ1
DQ2
DQ3
'4
Vcc
DQ5
DQ6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
Pin designation
TSOP 2
V
SS
DQ16
DQ15
DQ14
DQ13
Pin(s)
V
SS
DQ16
DQ15
DQ14
DQ13
V
SS
DQ12
DQ11
DQ10
DQ9
NC
Description
Address inputs
Row address strobe
Input/output
Output enable
Write enable
Column address strobe, upper byte
Column address strobe, lower byte
Power
Ground
V
SS
DQ7
DQ8
NC
NC
WE
RAS
NC
NC
A0
A1
DQ12
DQ11
DQ10
DQ9
NC
LCAS
UCAS
OE
A9
A8
A7
A6
A5
V
CC
DQ1
DQ2
DQ
3
DQ4
V
CC
DQ5
DQ6
DQ7
DQ8
NC
1
2
3
4
5
6
7
8
9
10
11
50
49
48
47
46
45
44
43
42
41
40
A0 to A9
RAS
DQ1 to DQ16
OE
WE
UCAS
LCAS
NC
NC
WE
RAS
A2
A3
Vcc
A4
V
SS
NC
NC
A0
A1
A2
A3
V
CC
15
16
17
18
19
20
21
22
23
24
25
36
35
34
33
32
31
30
29
28
27
26
NC
LCAS
UCAS
OE
V
CC
V
SS
A9
A8
A7
A6
A5
A4
V
SS
Selection guide
Symbol
Maximum
RAS
access time
Maximum column address access time
Maximum
CAS
access time
Maximum output enable (
OE
) access time
Minimum read or write cycle time
Minimum fast page mode cycle time
Maximum operating current
Maximum CMOS standby current
t
RAC
t
AA
t
CAC
t
OEA
t
RC
t
PC
I
CC1
I
CC5
-45
45
23
10
12
75
20
155
2.0
-50
50
25
12
13
80
20
145
2.0
-60
60
30
15
15
100
25
135
2.0
Unit
ns
ns
ns
ns
ns
ns
mA
mA
3/22/02; v.0.9.2
Alliance Semiconductor
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