AS3V2M16
&
ꢈꢈ
Write cycle (over the operating range)
–55
–70
–85
Parameter
Write cycle time
Symbol
tWC
tCW
tAW
Min
55
45
45
0
Max
–
Min
70
60
60
0
Max
–
Min
85
60
60
0
Max
–
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
12
Chip select to write end
Address setup to write end
Address setup time
–
–
–
–
–
–
tAS
–
–
–
12
Write pulse width
tWP
tAH
tDW
tDH
40
0
–
50
0
–
50
0
–
Address hold from end of write
Data valid to write end
Data hold time
–
–
–
25
0
–
30
0
–
30
0
–
–
–
–
4, 5
4, 5
4, 5
Write enable to output in high Z
Output active from write end
UB/ LB low to end of write
tWZ
tOW
tBW
0
20
–
0
20
–
0
20
–
5
5
5
45
–
60
–
60
–
ꢈꢉꢁꢈꢈ
Write waveform 1 (WE controlled, ZZ = High)
t
t
WC
CW
Address
CS
t
AH
t
BW
LB, UB
t
AW
t
t
AS
WP
WE
t
t
DH
DW
Data valid
D
IN
t
WZ
t
OW
D
Data undefined
OUT
High Z
ꢈꢉꢁꢈꢈ
Write waveform 2 (CS controlled, ZZ = High)
t
WC
Address
t
t
AH
AS
t
CW
CS
t
AW
t
BW
LB, UB
WE
t
WP
t
t
DH
DW
Data valid
High Z
D
IN
t
t
CLZ
WZ
t
OW
D
Data undefined
OUT
High Z
10/ 17/ 02, V. 0.9.9
Alliance Semiconductor
P. 6 of 10
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
