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AS29LV400T-120BI 参数 Datasheet PDF下载

AS29LV400T-120BI图片预览
型号: AS29LV400T-120BI
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash, 256KX16, 120ns, PBGA48, 6 X 8 MM, 1.20 MM HEIGHT, BGA-48]
分类和应用: 内存集成电路
文件页数/大小: 27 页 / 282 K
品牌: ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
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Mode
ID read MFR code
ID read device code
Read
Standby
Output disable
Write
Enable sector protect
Sector unprotect
Temporary sector
unprotect
Verify sector protect
Verify sector unprotect
Hardware Reset
CE
OE
WE
L
L
L
H
L
L
L
L
X
L
L
X
L
L
L
X
H
H
V
ID
V
ID
X
L
L
X
H
H
H
X
H
L
Pulse/L
Pulse/L
X
H
H
X
A0
L
H
A0
X
X
A0
L
L
X
L
L
X
A1
L
L
A1
X
X
A1
H
H
X
H
H
X
A6
L
L
A6
X
X
A6
L
H
X
L
H
X
A9
V
ID
V
ID
A9
X
X
A9
V
ID
V
ID
X
V
ID
V
ID
X
RESET
DQ
Code
Code
D
OUT
High Z
High Z
D
IN
X
X
X
Code
Code
High Z
H
H
H
H
H
H
H
H
V
ID
H
H
L
L = Low (<V
IL
) = logic 0; H = High (>V
IH
) = logic 1; V
ID
= 10.0 ± 1.0V; X = don’t care.
In ×16 mode, BYTE = V
IH
. In ×8 mode, BYTE = V
IL
with DQ8-DQ14 in high Z and DQ15 = A-1.
Verification of sector protect/unprotect during A9 = V
ID.
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Description
Selected by A9 = V
ID
(9.5V–10.5V),
C E
=
OE
= A1 = A6 = L, enabling outputs.
ID MFR code,
When A0 is low (V
IL
) the output data = 52h, a unique Mfr. code for Alliance Semiconductor Flash products.
device code
When A0 is high (V
IH
), D
OUT
represents the device code for the AS29LV400.
Selected with
CE
=
O E
= L,
WE
= H. Data is valid in t
ACC
time after addresses are stable, t
CE
after
C E
is low
Read mode
and t
OE
after
O E
is low.
Selected with
C E
= H. Part is powered down, and I
CC
reduced to <1.0 µA when
CE
= V
CC
± 0.3V =
R ES E T
.
If activated during an automated on-chip algorithm, the device completes the operation before entering
Standby
standby.
Output disable Part remains powered up; but outputs disabled with
O E
pulled high.
Selected with CE = WE = L, OE = H. Accomplish all Flash erasure and programming through the command
register. Contents of command register serve as inputs to the internal state machine. Address latching occurs
Write
on the falling edge of WE or CE, whichever occurs later. Data latching occurs on the rising edge WE or CE,
whichever occurs first. Filters on WE prevent spurious noise events from appearing as write commands.
Hardware protection circuitry implemented with external programming equipment causes the device to
Enable
disable program and erase operations for specified sectors. For in-system sector protection, refer to Sector
sector protect
protect algorithm on page 12.
Disables sector protection for all sectors using external programming equipment. All sectors must be
Sector
protected prior to sector unprotection. For in-system sector unprotection, refer to Sector unprotect
unprotect
algorithm on page 12.
Verifies write protection for sector. Sectors are protected from program/erase operations on commercial
Verify sector
programming equipment. Determine if sector protection exists in a system by writing the ID read command
protect/
sequence and reading location XXX02h, where address bits A12–17 select the defined sector addresses. A
unprotect
logical 1 on DQ0 indicates a protected sector; a logical 0 indicates an unprotected sector.
Temporarily disables sector protection for in-system data changes to protected sectors. Apply +10V to
R E SE T
Temporary
to activate temporary sector unprotect mode. During temporary sector unprotect mode, program protected
sector
sectors by selecting the appropriate sector address. All protected sectors revert to protected state on removal
unprotect
of +10V from
R E S ET
.
Item
8/9/01; V.0.9.9.1
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