欢迎访问ic37.com |
会员登录 免费注册
发布采购

A2040C-08SR 参数 Datasheet PDF下载

A2040C-08SR图片预览
型号: A2040C-08SR
PDF下载: 下载PDF文件 查看货源
内容描述: [PLL Based Clock Driver, 1 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, SOIC-8]
分类和应用: 驱动光电二极管逻辑集成电路
文件页数/大小: 9 页 / 492 K
品牌: ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
 浏览型号A2040C-08SR的Datasheet PDF文件第1页浏览型号A2040C-08SR的Datasheet PDF文件第2页浏览型号A2040C-08SR的Datasheet PDF文件第4页浏览型号A2040C-08SR的Datasheet PDF文件第5页浏览型号A2040C-08SR的Datasheet PDF文件第6页浏览型号A2040C-08SR的Datasheet PDF文件第7页浏览型号A2040C-08SR的Datasheet PDF文件第8页浏览型号A2040C-08SR的Datasheet PDF文件第9页  
December 2003  
P2040C  
rev 1.0  
Modulation Selection (Commercial) – Table 1  
Spreading Range  
54 MHz 65 MHz 81 MHz 108 MHz 162 MHz  
MRA SR1  
SR0  
Modulation Rate  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
+/-1.4% +/-1.2% +/-1.0% +/-0.8%  
+/-2.0% +/-1.9% +/-1.6% +/-1.2%  
+/-1.1% +/-0.9% +/-0.5% +/-0.4%  
+/-1.8% +/-1.5% +/-1.0% +/-0.6%  
+/-1.3% +/-1.3% +/-1.3% +/-1.2%  
+/-2.2% +/-2.1% +/-2.1% +/-1.9%  
+/-1.4% +/-1.3% +/-1.4% +/-1.2%  
+/-2.1% +/-2.1% +/-2.1% +/-2.0%  
+/-0.4%  
+/-0.8%  
+/-0.3%  
+/-0.4%  
+/-1.1%  
+/-1.8%  
+/-0.9%  
+/-1.4%  
(Fin/80) * 62.49 KHz  
(Fin/80) * 62.49 KHz  
(Fin/80) * 62.49 KHz  
(Fin/80) * 62.49 KHz  
(Fin/80) * 20.83 KHz  
(Fin/80) * 20.83 KHz  
(Fin/80) * 20.83 KHz  
(Fin/80) * 20.83 KHz  
Spread Spectrum Selection  
Table 1 illustrates the possible spread spectrum options. The optimal setting should minimize system EMI to the  
fullest without affecting system performance. The spreading is described as a percentage deviation of the center  
frequency (Note: the center frequency is the frequency of the external reference input on CLKIN, Pin 1).  
Example: P2040C is designed for high resolution flat panel applications and is able to support panel frequencies  
from 54MHz to 170MHz. For a 65MHz pixel clock frequency, a spreading selection of MRA=0, SR1=1 and SR0=1  
provides a percentage deviation of +/-1.50% (see Table 1). This results in frequency on ModOUT being swept  
from 64.03MHz to 65.98MHz at a modulation rate of 50.77KHz (see Table 1). This particular example (see Figure  
below) given here is a common EMI reduction method for notebook LCD panel and has already been  
implemented by most of the leading OEM and mobile graphic accelerator manufacturers.  
P2040C Application Schematic for Mobile LCD Graphics  
65MHz from graphics accelerator  
Modulated 65MHz signal with  
±0.75 deviation and modulation  
1
2
3
4
8
7
6
5
VDD  
CLKIN  
rate of 56.24KHz. This signal is  
connected back to the spread  
spectrum input pin (SSIN) of the  
graphics accelerator.  
SR0  
ModOUT  
SSON#  
MRA  
SR1  
VSS  
+3.3V  
0.1µF  
Digital control for the SS enable  
or disable  
P2040C  
LCD Panel EMI Reduction IC  
3 of 9  
Notice: The information in this document is subject to change without notice.