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A3967SLBTR-T 参数 Datasheet PDF下载

A3967SLBTR-T图片预览
型号: A3967SLBTR-T
PDF下载: 下载PDF文件 查看货源
内容描述: 微步进驱动器与转换器 [Microstepping Driver with Translator]
分类和应用: 驱动器转换器运动控制电子器件信号电路光电二极管电动机控制PC
文件页数/大小: 15 页 / 443 K
品牌: ALLEGRO [ ALLEGRO MICROSYSTEMS ]
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A3967
Microstepping Driver with Translator
Functional Description (cont’d)
RC Blanking.
In addition to the
xed off-time of the
PWM control circuit, the C
T
component sets the compara-
tor blanking time. This function blanks the output of the
current-sense comparator when the outputs are switched by
the internal current-control circuitry. The comparator out-
put is blanked to prevent false overcurrent detection due
to reverse recovery currents of the clamp diodes, and/or
switching transients related to the capacitance of the load.
The blank time t
BLANK
can be approximated by:
t
BLANK
= 1400C
T
Enable Input (ENABLE).
This active-low input enables
all of the outputs. When logic high the outputs are dis-
abled. Inputs to the translator (STEP, DIRECTION, MS
1
,
MS
2
) are all active independent of the ENABLE input
state.
Shutdown.
In the event of a fault (excessive junction
temperature) the outputs of the device are disabled until
the fault condition is removed. At power up, and in the
event of low V
CC
, the under-voltage lockout (UVLO)
circuit disables the drivers and resets the translator to the
home state.
Sleep Mode (SLEEP).
An active-low control input used
to minimize power consumption when not in use. This dis-
ables much of the internal circuitry including the outputs.
A logic high allows normal operation and startup of the
device in the home position.
Percent Fast Decay Input (PFD).
When a STEP input
signal commands a lower output current from the previous
step, it switches the output current decay to either slow-,
fast-, or mixed-decay depending on the voltage level at the
PFD input. If the voltage at the PFD input is greater than
0.6V
CC
then slow-decay mode is selected. If the voltage on
the PFD input is less than 0.21V
CC
then fast-decay mode is
selected. Mixed decay is between these two levels.
Mixed Decay Operation.
If the voltage on the PFD in-
put is between 0.6V
CC
and 0.21V
CC
, the bridge will oper-
ate in mixed-decay mode depending on the step sequence
(see
gures). As the trip point is reached, the device will
go into fast-decay mode until the voltage on the RC termi-
nal decays to the voltage applied to the PFD terminal. The
time that the device operates in fast decay is approximated
by:
t
FD
= R
T
C
T
In (0.6V
CC
/V
PFD
)
After this fast decay portion, t
FD
, the device will
switch to slow-decay mode for the remainder of the
xed
off-time period.
2.5
T
A
= +25°C
2.0
SOURCE DRIVER
1.5
OUTPUT SATURATION VOLTAGE IN VOLTS
1.0
Typical output saturation voltages show-
ing Satlington sink-driver operation.
0.5
SINK DRIVER
0
200
300
400
500
600
7 00
Dwg. GP-064-1A
OUTPUT CURRENT IN MILLIAMPERES
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
6