TM
A
L
D
DVANCED
INEAR
EVICES, INC.
®
e
EPAD
A
ALD810023/ALD810024/ALD810025/
ALD810026/ALD810027/ALD810028
QUAD SUPERCAPACITOR AUTO BALANCING (SAB™) MOSFET ARRAY
GENERAL DESCRIPTION
FEATURES & BENEFITS
TheALD8100xx andALD9100xx family of SupercapacitorAuto Balancing
MOSFETs, or SAB™ MOSFETs, are EPAD® MOSFETs designed to
address leakage balance of supercapacitors connected in series.
Supercapacitors, also known as ultracapacitors or supercaps, when con-
nected two in series, can be balanced with an ALD9100xx dual package.
Supercaps connected two, three or four in series can be balanced with an
ALD8100xx quad package.
• Simple and economical to use
• Precision factory trimmed
• Automatically regulates and balances leakage currents
• Effective for supercapacitor charge-balancing
• Balances up to 4 supercaps with a single IC package
• Balances 2-cell, 3-cell, 4-cell series-connected supercaps
• Scalable to larger supercap stacks and arrays
• Near zero additional leakage currents
ALD SAB MOSFETs have unique electrical characteristics for active con-
tinuous leakage current regulation and self-balancing of stacked series-
connected supercaps and, at the same time, dissipate near zero leakage
currents, practically eliminating extra power dissipation. For many
applications, SAB MOSFET automatic charge balancing offers a simple,
economical and effective method to balance and regulate supercap
voltages. With SAB MOSFETs, each supercap in a series-connected stack
is continuously and automatically controlled for precision effective supercap
leakage current and voltage balancing.
• Zero leakage at 0.3V below rated voltages
• Balances with series-connect and parallel-connect
• Leakage currents are exponential fuction of cell voltages
• Active current ranges from < 0.3nA to > 1000µA
• Always active, always fast response time
• Minimizes leakage currents and power dissipation
APPLICATIONS
SAB MOSFETs offer a superior alternative solution to other passive
resistor-based or operational amplifier based balancing schemes, which
typically contribute continuous power dissipation due to linear currents at
all voltage levels. They are also a preferred alternative to many other
active supercap charging and balancing regulator ICs where tradeoffs in
cost, efficiency, complexity and power dissipation are important design
considerations.
• Series-connected supercapacitor cell leakage balancing
• Energy harvesting
• Zero-power voltage divider at selected voltages
• Matched current mirrors and current sources
• Zero-power mode maximum voltage limiter
• Scaled supercapacitor stacks and arrays
The SAB MOSFET provides regulation of the voltage across a supercap
cell by increasing its drain current exponentially across the supercap when
supercap voltages increase, and by decreasing its drain current
exponentially across the supercap when supercap voltages decrease.
When a supercap in a supercap stack is charged to a voltage less than
90% of the desired voltage limit, the SAB MOSFET across the supercap
is turned off and there is zero leakage current contribution from the SAB
MOSFET. On the other hand, when the voltage across the supercap is
over the desired voltage limit, the SAB MOSFET is turned on to increase
its drain currents to keep the over-voltage from rising across the supercap.
However, the voltages and leakages of other supercaps in the stack are
lowered simultaneously to maintain near-zero net leakage currents.
PIN CONFIGURATION
ALD8100xx
16
15
14
13
12
11
1
2
3
IC*
IC*
M1
M2
D
D
N1
N1
N2
N2
The ALD8100xx/ALD9100xx SAB MOSFET family offers the user a se-
lection of different threshold voltages for various supercap nominal volt-
age values and desired leakage balancing characteristics. Each SAB
MOSFET generally requires connecting its V+ pin to the most positive
voltage and its V- and IC pins to the most negative voltage within the
package. Note that each Drain pin has an internal reverse biased diode
to its Source pin, and each Gate pin has a reverse biased diode to V-. All
other pins must have voltages within V+ and V- voltage limits. Standard
ESD protection facilities and handling procedures for static sensitive de-
vices must also be used.
G
S
G
S
V-
V-
N1
N2
V+
4
5
V-
M3
V-
M4
D
N4
G
N4
S
N4
D
N3
N3
N3
6
7
8
ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS))
G
S
10
9
Operating Temperature Range*
0°C to +70°C
V-
16-Pin SOIC Package
SCL PACKAGES
ALD810023SCL
ALD810024SCL
ALD810025SCL
ALD810026SCL
ALD810027SCL
ALD810026SCL
*IC pins are internally connected, connect to V-
* Contact factory for industrial temp. range or user-specified threshold voltage values.
©2013 Advanced Linear Devices, Inc., Vers. 1.0
www.aldinc.com
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ALD [ ADVANCED LINEAR DEVICES ]
