ASAHI KASEI
[AK5392]
Figure 6 shows a input buffer circuit example. This is a full-differential input buffer circuit with an inverted-amp (gain:
-10dB). The capacitor of 2200pF between VREF+/- decreases the clock feed through noise of modulator. And the
resistor of 51 ohms is inserted in order to stabilize the op-amps before the ADC. This circuit is also a low pass filter
with cut-off frequency of about 220kHz. In this example, the internal offset is removed by self calibration.The
evaluation board should be refered about the detail.
Figure 6 . Differential Input Buffer Example
0188-E-01
1997/11
- 16 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
