ASAHI KASEI
[AK5365
]
No.
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Pin Name
LRCK
MCLK
PDN
ALC
SMUTE
SEL0
SEL1
SEL2
CDTI
SDA
CCLK
SCL
CSN
CAD1
CTRL
M/S
RIN1
TEST5
RIN2
TEST6
RIN3
TEST7
RIN4
TEST8
RIN5
I/O
I/O
I
I
I
I
I
I
I
I
I/O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Function
Output Channel Clock Pin
Master Clock Input Pin
Power-Down Mode Pin
“H”: Power up, “L”: Power down reset and initializes the control register.
ALC Enable Pin
(Internal Pull-down Pin, typ. 100kΩ)
“H” : ALC Enable, “L” : ALC Disable
Soft Mute Pin
(Internal Pull-down Pin, typ. 100kΩ)
“H” : Soft Mute, “L” : Normal Operation
Input Selector 0 Pin
Input Selector 1 Pin
Input Selector 2 Pin
Control Data Input Pin in 3-wire Control
(CTRL pin = “L”)
2
(CTRL pin = “H”)
Control Data Input / Output Pin in I C Control
Control Data Clock Pin in 3-wire Control
(CTRL pin = “L”)
2
Control Data Clock Pin in I C Control
(CTRL pin = “H”)
Chip Select Pin in 3-wire Control
(CTRL pin = “L”)
2
(CTRL pin = “H”)
Chip Address 1 Select Pin in I C Control
Control Mode Pin
“H” : I
2
C Control & I
2
S Compatible, “L” : 3-wire Control
Master / Slave Mode Pin
“H” : Master Mode, “L” : Slave Mode
Rch Analog Input 1 Pin
Test 5 Pin (Connected to AVSS)
Rch Analog Input 2 Pin
Test 6 Pin (Connected to AVSS)
Rch Analog Input 3 Pin
Test 7 Pin (Connected to AVSS)
Rch Analog Input 4 Pin
Test 8 Pin (Connected to AVSS)
Rch Analog Input 5 Pin
Note: All digital input pins except pull-down pins should not be left floating.
Note: TEST5, TEST6, TEST7 and TEST8 pins should be connected to AVSS.
MS0164-E-01
-5-
2002/08
AKM [ ASAHI KASEI MICROSYSTEMS ]
