ASAHI KASEI
No. Pin Name
[AK5353]
PIN/FUNCTION
I/O
I
I
Description
1
2
3
AINR
AINL
VREF
Rch Analog Input Pin
Lch Analog Input Pin
Voltage Reference Output Pin
O
Normally connected to AGND with a 0.1uF ceramic capacitor
in parallel with an electrolytic capacitor less than 4.7uF.
Common Voltage Output Pin
4
VCOM
O
Normally connected to AGND with a 0.1uF ceramic capacitor
in parallel with an electrolytic capacitor less than 4.7uF.
Analog Ground Pin, 0V
Analog Power Supply Pin, +2.7 +5.5V
Digital Power Supply Pin, +2.7 +5.5V
Digital Ground Pin, 0V
5
6
7
8
9
AGND
VA
VD
DGND
SDTO
-
-
-
-
O
Serial Data Output Pin
Data bits are presented MSB first, in 2 s complement format.
This pin is L in the power-down mode.
Left/Right Channel Select Pin
The fs clock is input to this pin.
Master Clock Input Pin
10 LRCK
11 MCLK
I
I
I
SCLK
Serial Data Input Pin
12
Output data is clocked out on the falling edge of SCLK.
Power-Down Pin
13 PDN
I
When L , the circuit is in power-down mode.
The AK5353 should always be reset upon power-up.
Serial Interface Format Pin
14 DIF
15 TTL
16 TST
I
I
I
L : MSB justified, H : I2S
Digital Input Level Select Pin
L : CMOS level (VA,VD=2.7 5.5V), H : TTL level (VA,VD=4.5 5.5V)
Test Pin (Internal pull-down pin)
This pin should be left floating.
Note: All input pins except pull-down pins should not be left floating.
M0067-E-00
1999/06
- 3 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
