ASAHI KASEI
[AK5353]
SYSTEM DESIGN
Figure 4 shows the system connection diagram. An evaluation board is available which demonstrates application circuits,
the optimum layout, power supply arrangements and measurement results.
4.7u 470
Rch In
+
2.2n
4.7u 470
1
2
3
4
5
6
7
8
AINR
AINL
VREF
VCOM
AGND
VA
TST 16
TTL 15
Lch In
+
2.2n
Mode Control
DIF 14
AK5353
0.1u
4.7u
0.1u
PDN 13
SCLK 12
MCLK 11
LRCK 10
Power-down Control
+
+
4.7u
Top View
0.1u
10u
+
+
Analog 5V
Controller
VD
10u
0.1u
DGND
SDTO
9
Analog Ground
System Ground
Figure 4. Typical Connection Diagram
Note: The value of electrolytic capacitor at VCOM depends on the low-frequency noise of power supply.
Digital Ground
Analog Ground
1
2
3
4
5
6
7
8
AINR
AINL
VREF
VCOM
AGND
VA
TST 16
TTL 15
System
Controller
DIF 14
PDN 13
SCLK 12
MCLK 11
LRCK 10
AK5353
VD
DGND
SDTO
9
Figure 5. Ground Layout
Note: AGND and DGND must be connected to the same analog ground plane.
M0067-E-00
1999/06
- 14 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
