ASAHI KASEI
21
[AK5351]
SDATA
O
I
Serial Data Output pin
Data are output with MSB first, in 2's complement format.
After 20 bits are output it turns to "L". It also remains "L" at a
power-down mode(PD="L").
Master Clock Selection pin
22
CMODE
"L": MCLK=256fs
"H": MCLK=384fs
23
15
SMODE1
SMODE2
I
I
Serial Interface Mode Select pin
Defines the directions of LRCK, SCLK and FSYNC pins and
Output Data Format. SMODE2 is pull-down pin.
SMODE1 SMODE2
MODE
LRCK
: H/L
: H/L
: L/H
: L/H
L
L
Slave mode: MSB justified
Master mode: Similar to I2S
Slave mode: I2S
Master mode: I2S
H
L
L
H
H
H
24
VB
-
Substrate Power Supply, +5V
0166-E-00
1997/4
- 4 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
