[AK4753]
LRCK
(Master)
LRCK
(Slave)
63
0
1
2
14 20 21 23 24 25 26 27 37 38 39 40 41 46 47 48 49 50
61 62 63
0
BICK(64fs)
SDTI(i)
Lch
Rch
23 22 21
4
3
0
23 22 21
1
10
9
8
7
2
1
0
1/fs
23:MSB, 0:LSB
Figure 39. Mode 7 Timing (BCKP bit= “0”, MSBS bit= “0”)
LRCK
(Master)
LRCK
(Slave)
63
63
63
0
0
0
1
2
14 20 21 23 24 25 26 27 37 38 39 40 41 46 47 48 49 50
61 62 63
61 62 63
61 62 63
0
0
0
BICK(64fs)
SDTI(i)
Lch
Rch
23 22 21
4
3
0
23 22 21
1
10
9
8
7
2
1
0
1/fs
23:MSB, 0:LSB
Figure 40. Mode 7 Timing (BCKP bit= “1”, MSBS bit= “0”)
LRCK
(Master)
LRCK
(Slave)
1
2
14 20 21 23 24 25 26 27 37 38 39 40 41 46 47 48 49 50
BICK(64fs)
SDTI(i)
Lch
Rch
23 22 21
4
3
0
23 22 21
1
10
9
8
7
2
1
0
1/fs
23:MSB, 0:LSB
Figure 41. Mode 7 Timing (BCKP bit= “0”, MSBS bit= “1”)
LRCK
(Master)
LRCK
(Slave)
1
2
14 20 21 23 24 25 26 27 37 38 39 40 41 46 47 48 49 50
BICK(64fs)
SDTI(i)
Lch
Rch
23 22 21
4
3
0
23 22 21
1
10
9
8
7
2
1
0
1/fs
23:MSB, 0:LSB
Figure 42. Mode 7 Timing (BCKP bit= “1”, MSBS bit= “1”)
MS1311-E-00
2011/07
- 31 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
