[AK4679]
(2) Middle Frequency Range
Bypass (DMHPF1-0 = DMLPF1-0 bits = “00”)
HPF
LPF
VOLM
DVLCM
VM1X/Y5-0
VM2X/Y5-0
VM3X/Y4-0
M1G6-0
DMHPF1-0
DMHA13-0
DMHB13-0
DMLPF1-0
DMLA13-0
DMLB13-0
M2G6-0
M3G6-0
M4G6-0
Figure 71. DVLC Functions and Signal Path for Middle Frequency Range
(2-1) High Pass Filter (HPF)
This is composed with 1st or 2nd order HPF. The coefficient of HPF is set by DMHA13-0 bits and DMHB13-0 bits. HPF
bit controls ON/OFF of the HPF. When the HPF is OFF, the audio data passes this block by 0dB gain. The coefficient
must be set when DMHPF1-0 bits = “00” or PMDRC bit = “0”. The HPF starts operation 4/fs(max) after when
DMHPF1-0 bits = “01” or “10” and PMDRC bit = “1” are set.
DMHPF1 bit DMHPF0 bit
Mode
Bypass
1st order HPF
2nd order HPF
N/A
0
0
1
1
0
1
0
1
(default)
Table 53. DMHPF Mode Setting (N/A: Not available)
fs: Sampling frequency
fc: Cut-off frequency
Register setting
HPF: DMHA[13:0] bits =A, DMHB[13:0] bits =B
(MSB=DMHA13, DMHB13; LSB=DMHA0, DMHB0)
1 / tan (πfc/fs)
1 − 1 / tan (πfc/fs)
1 + 1 / tan (πfc/fs)
A =
,
B =
1 + 1 / tan (πfc/fs)
Transfer function (1st order)
1 − z −1
H(z) = A
1 + Bz −1
Transfer function (2nd order)
1 − z −1
1 − z −1
H(z) = A
x A
1 + Bz −1
1 + Bz −1
The cut-off frequency should be set as below.
fc/fs ≥ 0.0001 (fc min = 4.41Hz at 44.1kHz)
MS1402-E-06
2013/02
- 91 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
