[AK4675]
Addr Register Name
01H Power Management 1
R/W
D7
GDDLY
R/W
0
D6
0
RD
0
D5
0
RD
0
D4
0
RD
0
D3
0
D2
0
D1
0
RD
0
D0
PMSPK
R/W
0
RD
0
RD
0
Default
PMSPK: Power Management for Speaker-Amp
0: Power OFF (default)
1: Power ON
When PMSP bit is “0”, the SPP pin and SPN pin become Hi-Z.
GDDLY: Gate driver delay setting for dulling output wave of Class-D
0: 15ns (default)
1: 60ns
Delay increase, EMI improve, Efficiency down when “0” Æ “1”
Addr Register Name
02H Power Management 2
R/W
D7
0
RD
0
D6
0
RD
0
D5
0
RD
0
D4
0
RD
0
D3
0
RD
0
D2
0
RD
0
D1
0
RD
0
D0
PMV1
R/W
0
Default
PMV1: Power Management for Input Volume #1
0: Power OFF (default)
1: Power ON
All blocks of HP/SPK-Amp blocks can be powered-down by setting the PDNA pin to “L” regardless of register
values setup. In this case, all control register values of HP/SPK-Amp blocks are initilized.
When all registers in address 00H, 01H and 02H are set to “0”, all blocks of HP/SPK-Amp blocks are
powered-down. The register values of HP/SPK-Amp blocks remain unchanged. Power supply current is 18μA(typ).
For fully shut down, set the PDNA pin to “L”.
MS0963-E-00
2008/05
- 170 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
