[AK4675]
■ Register Map (HP/SPK-Amp Blocks)
Addr Register Name
D7
D6
D5
D4
D3
D2
D1
D0
PMMHR
PMMHL
PMHPR
PMVCMA
PMHPL
PMOSC
00H Power Management 0
01H Power Management 1
02H Power Management 2
03H Mode Control 0
04H Lch Headphone Mixer
05H Rch Headphone Mixer
06H Reserved
0
PMCP
GDDLY
0
0
0
0
PMSPK
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PMV1
THDET
0
0
0
0
0
0
0
HPLR1
HPRR1
HPLL1
HPRL1
0
0
0
0
0
07H Reserved
0
0
0
0
0
0
0
0
08H Input Volume #1
09H Reserved
0AH Reserved
R1V3
R1V2
0
0
0
0
HPZ
0
R1V1
0
0
R1V0
0
0
0
0
L1V3
0
0
L1V2
0
0
L1V1
0
0
0
0
L1V0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0BH Reserved
0
0
0
MOFF
HPMTN
SPGA5
PTS1
HPGA3
SPGA3
PTS0
HPGA2
SPGA2
0CH Mode Control 1
0DH Headphone PGA Control
0EH Speaker PGA Control
0FH ALCA Mode Control 1
10H ALCA Mode Control 2
11H ALCA Mode Control 3
12H Mode Control 2
HPGA4
SPGA4
HPGA1
SPGA1
HPGA0
SPGA0
0
REFA5 REFA4 REFA3 REFA2 REFA1 REFA0
WTMA2
RGAINA1
BATCPU
WTMA1
WTMA0
LMTHA
OSCN
ZTMA1 ZTMA0
LMATA1 LMATA0
0
ALCA
0
0
RGAINA0
ZELMNA
0
0
0
MSEL
All registers writing are inhibited at PDNA pin = “L”.
The PDNA pin = “L” resets the HP/SPK-Amp’s registers to their default value.
Note 88: The bits defined as 0 must contain a “0” value.
Note 89: Only write to address 00H to 12H.
MS0963-E-00
2008/05
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