[AK4627]
Digital Ground
Analog Ground
DZF2 36
1
CAD0
CAD1
35
34
33
32
31
30
29
28
DZF1
VSS2
2
3
System
Controller
P/S
AVDD
VREFH
VCOM
4
SDTO1
5
SDTO2
AK4627
6
TVDD
ROUT1
LOUT1
ROUT2
7
DVDD
8
VSS1
9
TDM0/SDA/CDTI
DIF1/SCL/CCLK
LOUT2 27
ROUT3 26
LOUT3 25
10
11 DIF0/CSN
PDN
12
Figure 32. Ground Layout
Note: VSS1 and VSS2 must be connected to the same analog ground plane.
1. Grounding and Power Supply Decoupling
The AK4627 requires careful attention to power supply and grounding arrangements. AVDD and DVDD are usually
supplied from analog supply in system. Alternatively if AVDD and DVDD are supplied separately, the power up
sequence is not critical. VSS1 and VSS2 of the AK4627 must be connected to analog ground plane. System analog
ground and digital ground should be connected together near to where the supplies are brought onto the printed circuit
board. Decoupling capacitors should be as near to the AK4627 as possible, with the small value ceramic capacitor being
the nearest.
2. Voltage Reference Inputs
The voltage of VREFH sets the analog input/output range. The VREFH pin is normally connected to the AVDD pin with
a 0.1µF ceramic capacitor in between the VSS2 pin. VCOM is a signal ground of this chip. A 2.2µF electrolytic capacitor
in parallel with a 0.1µF ceramic capacitor attached to between the VCOM and VSS2 pins eliminates the effects of high
frequency noise. No load current may be drawn from the VCOM pin. All signals, especially clocks, should be kept away
from the VREFH and VCOM pins in order to avoid unwanted coupling into the AK4627.
3. Analog Inputs
The ADC inputs correspond to single-ended and differential which able to select by the SGL pin. When the inputs are
single-ended, the signal is internally biased to the common voltage (AVDD1x1/2) with 14kΩ(typ) resistance. The input
signal range scales with the supply voltage and nominally 0.68xVREFH Vpp (typ) @fs=48kHz. When the inputs are
differential, the signal is internally biased to the common voltage (AVDD2x1/2) with 32kΩ(typ) resistance. The input
signal range between LIN(RIN)+ and LIN(RIN)− scales with the supply voltage and nominally ±0.68xVREFH Vpp (typ)
@fs=48kHz .The ADC output data format is 2’s complement. The internal HPF removes the DC offset.
The AK4627 samples the analog inputs at 64fs. The digital filter rejects noise above the stop band except for multiples of
the sampling frequency of analog inputs. The AK4627 includes an anti-aliasing filter (RC filter) to attenuate a noise
around the sampling frequency of analog inputs.
MS1278-E-02
2012/03
- 41 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
