ASAHI KASEI
[AK4528]
n Register Map
Addr
Register Name
D7
D6
0
TE6
DIF1
0
D5
0
TE5
DIF0
0
D4
0
TE4
CMODE
0
ATTL4
ATTR4
D3
0
0
CKS1
HPFR
ATTL3
ATTR3
D2
PWVR
0
CKS0
HPFL
ATTL2
ATTR2
D1
PWAD
RSTADN RSTDAN
D0
PWDA
00H Power Down Control
01H Reset Control
02H Clock and Format Control
03H Deem and Volume Control
04H Lch ATT Control
05H Rch ATT Control
0
TE7
DIF2
SMUTE
0
0
DFS
DEM1
ATTL1
ATTR1
DEM0
ATTL0
ATTR0
ATTL6 ATTL5
ATTR6 ATTR5
0
Note: For address from 06H to 1FH, data should not be written.
In case of writing to 01H, write”0000” to D7-4.
PDN = “L” resets the registers to their default values.
n Control Register Setup Sequence
The setting of clock mode or data format by control register should be done during RSTADN=RSTDAN= “0”, and outputs
of ADC/DAC should be muted.
1. In case of using PDN pin
(1) Set PDN= “H”.
(2) Set registers for clock mode, data format, etc.
(3) Cancel the reset state by setting RSTADN or RSTDAN to “1”. Refer to Reset Contorl Register (01H).
2. In case of not using PDN pin
(1)Set RSTADN=RSTDAN= “0”.
(2)Set registers for clock mode, data format, etc.
(3)Cancel the reset state by setting RSTADN or RSTDAN to “1”. Refer to Reset Contorl Register (01H).
Note: Those settings may generate pop noise. Please mute the output of ADC and DAC externally.
MS0011-E-00
2000/1
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AKM [ ASAHI KASEI MICROSYSTEMS ]
