欢迎访问ic37.com |
会员登录 免费注册
发布采购

AK4527BVQ 参数 Datasheet PDF下载

AK4527BVQ图片预览
型号: AK4527BVQ
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能多通道音频编解码器 [HIGH PERFORMANCE MULTI-CHANNEL AUDIO CODEC]
分类和应用: 解码器编解码器消费电路商用集成电路
文件页数/大小: 33 页 / 293 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
 浏览型号AK4527BVQ的Datasheet PDF文件第2页浏览型号AK4527BVQ的Datasheet PDF文件第3页浏览型号AK4527BVQ的Datasheet PDF文件第4页浏览型号AK4527BVQ的Datasheet PDF文件第5页浏览型号AK4527BVQ的Datasheet PDF文件第7页浏览型号AK4527BVQ的Datasheet PDF文件第8页浏览型号AK4527BVQ的Datasheet PDF文件第9页浏览型号AK4527BVQ的Datasheet PDF文件第10页  
ASAHI KASEI
[AK4527B]
No.
23
24
25
26
27
28
29
30
31
32
33
Pin Name
LOUT3
ROUT3
LOUT2
ROUT2
LOUT1
ROUT1
LIN-
LIN+
RIN-
RIN+
DZF2
I/O
O
O
O
O
O
O
I
I
I
I
O
Function
DAC3 Lch Analog Output Pin
DAC3 Rch Analog Output Pin
DAC2 Lch Analog Output Pin
DAC2 Rch Analog Output Pin
DAC1 Lch Analog Output Pin
DAC1 Rch Analog Output Pin
Lch Analog Negative Input Pin
Lch Analog Positive Input Pin
Rch Analog Negative Input Pin
Rch Analog Positive Input Pin
Zero Input Detect 2 Pin
(Note 2)
When the input data of the group 1 follow total 8192 LRCK cycles with “0” input data,
this pin goes to “H”.
Analog Input Overflow Detect Pin (Note 3)
This pin goes to “H” if the analog input of Lch or Rch is overflows.
Common Voltage Output Pin, AVDD/2
Large external capacitor around 2.2µF is used to reduce power-supply noise.
Positive Voltage Reference Input Pin, AVDD
Analog Power Supply Pin, 4.5V∼5.5V
Analog Ground Pin, 0V
Zero Input Detect 1 Pin
(Note 2)
When the input data of the group 1 follow total 8192 LRCK cycles with “0” input data,
this pin goes to “H”.
Master Clock Input Pin
Parallel/Serial Select Pin
“L”: Serial control mode, “H”: Parallel control mode
Audio Data Interface Format 0 Pin in parallel control mode
Chip Select Pin in 3-wire serial control mode
This pin should be connected to DVDD at I
2
C bus control mode
Audio Data Interface Format 1 Pin in parallel control mode
Control Data Clock Pin in serial control mode
I2C = “L”: CCLK (3-wire Serial), I2C = “H”: SCL (I
2
C Bus)
Loopback Mode 0 Pin in parallel control mode
Enables digital loop-back from ADC to 3 DACs.
Control Data Input Pin in serial control mode
I2C = “L”: CDTI (3-wire Serial), I2C = “H”: SDA (I
2
C Bus)
Loopback Mode 1 Pin
(Note 1)
Enables all 3 DAC channels to be input from SDTI1.
OVF
34
35
36
37
38
VCOM
VREFH
AVDD
AVSS
DZF1
O
O
I
-
-
O
39
40
41
MCLK
P/S
DIF0
CSN
DIF1
SCL/CCLK
LOOP0
SDA/CDTI
I
I
I
I
I
I
I
I/O
I
42
43
44
LOOP1
Notes: 1. SDOS, SMUTE, DFS, and LOOP1 pins are ORed with register data if P/S = “L”.
2. The group 1 and 2 can be selected by DZFM2-0 bits if P/S = “L” and DZFE = “L”.
3. This pin becomes OVF pin if OVFE bit is set to “1” at serial control mode.
4. All input pins should not be left floating.
MS0056-E-00
-6-
2000/10