[AK4497]
8.Electrical Characteristics
■ Analog Characteristics
(Ta=25C; LDOE pin = “L”, AVDD=TVDD=3.3V, DVDD=1.8V, AVSS=DVSS=VSSL/R=0V;
VREFHL/R=VDDL/R=5.0V, VREFLL/R= 0V; Input data = 24bit; BICK=64fs; Signal Frequency = 1kHz;
Sampling Frequency = 44.1kHz; Measurement bandwidth = 20Hz ~ 20kHz; External Circuit: Figure 77;
SC[2:0] bit=“000”; 2Vrms output mode (GC[2:0] bit=“000” or GAIN pin=“L”); Heavy load drive
mode=off(HLOAD bit=”0” or HLOAD pin=”L”); unless otherwise specified.)
Parameter
Min.
Typ.
Max.
Unit
Resolution
-
-
32
Bits
Dynamic Characteristics
(Note 9)
0dBFS
GC[2:0]= “000” or
GAIN= “L”
GC[2:0]= “100” or
GAIN= “H”
-
-
116
113
108
dB
THD+N
fs=44.1kHz BW=20kHz
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
dB
dB
dB
dB
dB
dB
dB
dB
60dBFS
0dBFS
60dBFS
0dBFS
60dBFS
60dBFS
65
113
62
110
-62
fs=96kHz
BW=40kHz
BW=40kHz
BW=80kHz
fs=192kHz
-59
Dynamic Range (60dBFS with A-weighted) (Note 10)
GC[2:0]= “000” or GAIN= “L”
125
125
-
128
128
131
S/N (A-weighted)
(Note 11)
Stereo mode
Mono mode
(Note 17)
GC[2:0]= “100” or GAIN= “H”
dB
dB
-
133
120
-
-
Interchannel Isolation (1kHz)
DC Accuracy
110
Interchannel Gain Mismatch
Gain Drift
-
-
0.15
20
2.8
3.75
10
0.3
-
2.95
3.95
-
dB
ppm/C
Vpp
Vpp
k
(Note 12)
Output
GC[2:0] bits=“000” or GAIN pin=“L” (Note 13)
GC[2:0] bits=“100” or GAIN pin=“H” (Note 14)
HLOAD bit=“0” or HLOAD pin=“L”
2.65
3.55
8
Voltage
Load
Resistance
(Note 15)
Load Capacitance
HLOAD bit=“1” or HLOAD pin=“H”
120
-
-
-
-
(Note 15)
25
pF
Note 9. Measured by Audio Precision APx555. Averaging mode.
Note 10. 101dB at 16bit data and 118dB at 20bit data.
Note 11. S/N does not depend on the input data size.
Note 12. The voltage on (VREFH VREFL) is held +5V externally.
Note 13. The analog output voltage with 0dBFS input signal when GC[2:0] bits = “000” or the GAIN pin =
“L” is calculated by the following formula.
AOUTL/R (typ.@0dB) = (AOUT+) (AOUT) = 2.8Vpp (VREFHL/R VREFLL/R)/5.
Note 14. The analog output voltage with 0dBFS input signal when GC[2:0] bits = “100” or the GAIN pin =
“H” is calculated by the following formula.
AOUTL/R (typ.@0dB) = (AOUT+) (AOUT) = 3.75Vpp (VREFHL/R VREFLL/R)/5.
Note 15. Regarding Load Resistance, AC load is 8k (min) with a DC cut capacitor when HLOAD bit = “0”
or the HLOAD pin = “L”. DC load is 120 (min) without a DC cut capacitor if the HLOAD pin = “H”.
The load resistance value is with respect to ground. Analog characteristics are sensitive to
capacitive load that is connected to the output pin. Therefore the capacitive load must be
minimized.
Note 16. It is recommended to use a resistor with 0.1% absolute error for the output stage of the adding
circuit.
Note 17. This mode is shown in Figure 78.
016003187-E-00
2016/05
- 11 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
