[AK4425A]
DC CHARACTERISTICS
(Ta = 25°C; VDD=AVDD = +4.5
∼
+5.5V)
Parameter
High-Level Input Voltage
Low-Level Input Voltage
Input Leakage Current
Symbol
VIH
VIL
Iin
min
2.2
-
-
typ
-
-
-
max
-
0.8
±
10
Units
V
V
μA
SWITCHING CHARACTERISTICS
(Ta = 25°C; VDD=AVDD = +4.5
∼
+5.5V)
Parameter
Symbol
min
Typ
fCLK
2.048
11.2896
Master Clock Frequency
dCLK
30
Duty Cycle
LRCK Frequency
Normal Speed Mode
fsn
8
Double Speed Mode
fsd
32
Quad Speed Mode
fsq
120
Duty Cycle
Duty
45
Audio Interface Timing
BICK Period
tBCK
1/128fsn
Normal Speed Mode
tBCK
1/64fsd
Double Speed Mode
tBCK
1/64fsq
Quad Speed Mode
tBCKL
30
BICK Pulse Width Low
tBCKH
30
Pulse Width High
tBLR
20
BICK “↑” to LRCK Edge (Note
tLRB
20
LRCK Edge to BICK “↑” (Note
tSDH
20
SDTI Hold Time
tSDS
20
SDTI Setup Time
Control Interface Timing
tCCK
200
CCLK Period
tCCKL
80
CCLK Pulse Width Low
tCCKH
80
Pulse Width High
tCDS
40
CDTI Setup Time
tCDH
40
CDTI Hold Time
tCSW
150
CSN High Time
tCSS
50
CSN “↓” to CCLK “↑”
tCSH
50
CCLK “↑” to CSN “↑”
Note 14. BICK rising edge must not occur at the same time as LRCK edge.
max
36.864
70
48
96
192
55
Units
MHz
%
kHz
kHz
kHz
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MS1127-E-01
-8-
2011/03
AKM [ ASAHI KASEI MICROSYSTEMS ]
