[AK4421]
SWITCHING CHARACTERISTICS
(Ta = 25°C; VDD=CVDD = +3.0
∼
+3.6V)
Parameter
Symbol
min
typ
fCLK
4.096
11.2896
Master Clock Frequency
dCLK
40
Duty Cycle
LRCK Frequency
8
fsn
Normal Speed Mode
32
fsd
Double Speed Mode
120
fsq
Quad Speed Mode
45
Duty
Duty Cycle
Audio Interface Timing
BICK Period
tBCK
1/128fsn
Normal Speed Mode
tBCK
1/64fsd
Double Speed Mode
tBCK
1/64fsq
Quad Speed Mode
tBCKL
30
BICK Pulse Width Low
tBCKH
30
Pulse Width High
tBLR
20
BICK “↑” to LRCK Edge (Note
tLRB
20
LRCK Edge to BICK “↑” (Note
tSDH
20
SDTI Hold Time
tSDS
20
SDTI Setup Time
Note 15. BICK rising edge must not occur at the same time as LRCK edge.
max
36.864
60
48
96
192
55
Units
MHz
%
kHz
kHz
kHz
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
MS0945-E-01
-7-
2008/08
AKM [ ASAHI KASEI MICROSYSTEMS ]
