[AK4388A]
LRCK
0
1
2
22
23
24
30
31
0
1
2
22
23
24
30
31
0
1
BICK
(64fs)
SDTI
Mode 2
23 22
23:MSB, 0:LSB
1
0
Don’t care
23 22
1
0
Don’t care
23 22
Lch Data
Rch Data
Figure 6. Mode 2 Timing
LRCK
0
1
2
3
23
24
25
31
0
1
2
3
23
24
25
31
0
1
BICK
(64fs)
SDTI
Mode 3
1
0
Don’t care
23 22
1
0
Don’t care
23
23 22
23:MSB, 0:LSB
Lch Data
Figure 7. Mode 3 Timing
Rch Data
■ De-emphasis Filter
A digital de-emphasis filter is built-in (tc = 50/15µs). The DEM pin is internal pull-down pin. The digital de-emphasis
filter is enabled by setting the DEM pin to “H”. Refer to “FILTER CHARACTERISTICS” regarding the gain error when
the de-emphasis filter is enabled. In case of double speed mode (MCLK=256fs/384fs) and quad speed mode
(MCLK=128fs/192fs), the digital de-emphasis filter is always off.
DEM pin
De-emphasis Filter
1
0
ON
(default)
OFF
Table 6. De-emphasis Filter Control (Normal Speed Mode)
MS1008-E-02
2010/09
- 10 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
