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AK4372 参数 Datasheet PDF下载

AK4372图片预览
型号: AK4372
PDF下载: 下载PDF文件 查看货源
内容描述: DAC内置有PLL和HP- AMP [DAC with built-in PLL & HP-AMP]
分类和应用:
文件页数/大小: 62 页 / 1025 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
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[AK4372]  
AVDD  
AK4372  
110k  
LIN1 pin  
HP-Amp  
LIN1HL bit  
100k  
Note: If the path is OFF and the signal is input to the input pin, the input pin should be biased to a voltage equivalent to  
VCOM voltage (= 0.475 x AVDD) externally.  
Figure 51. External Bias Circuit Example for Line Input Pin  
1. Grounding and Power Supply Decoupling  
The AK4372 requires careful attention to power supply and grounding arrangements. AVDD is usually supplied from the  
analog power supply in the system and DVDD is supplied from AVDD via a 10Ω resistor. Alternatively if AVDD and  
DVDD are supplied separately, AVDD should be powered-up after DVDD rises up to 1.6V or more. When the AK4372  
is powered-down, DVDD should be powered-down at the same time or later than AVDD. VSS1 and VSS2 must be  
connected to the analog ground plane. System analog ground and digital ground should be connected together near to  
where the supplies are brought onto the printed circuit board. Decoupling capacitors should be as close to the AK4372 as  
possible, with the small value ceramic capacitors being the nearest.  
2. Voltage Reference  
The input voltage to AVDD sets the analog output range. Usually a 0.1μF ceramic capacitor is connected between AVDD  
and VSS1. VCOM is a signal ground of this chip (0.475 x AVDD). The electrolytic capacitor around 2.2μF attached  
between VCOM anVSS1 eliminates the effects of high frequency noise, too. No load current may be drawn from the  
VCOM pin. All signals, especially clock, should be kept away from AVDD and VCOM in order to avoid unwanted  
coupling into the AK4372.  
3. Analog Outputs  
The analog outputs are single-ended outputs, and 0.48 x AVDD Vpp(typ)@3dBFS for headphone-amp, 0.61xAVDD  
Vpp(typ) @0dBFS for LOUT/ROUT centered on the VCOM voltage. The input data format is 2’s compliment. The  
output voltage is a positive full scale for 7FFFFFH(@24bit) and negative full scale for 800000H(@24bit). The ideal  
output is VCOM voltage for 000000H(@24bit).  
DC offsets on the analog outputs should be eliminated by AC coupling since the analog outputs have a DC offset equal to  
VCOM plus a few mV.  
MS0684-E-02  
2008/12  
- 60 -  
 
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