ASAHI KASEI
[AK4370]
SYSTEM DESIGN
Figure 38 shows the system connection diagram. An evaluation board [AKD4370] is available which demonstrates the
optimum layout, power supply arrangements and measurement results.
Analog Supply
+
1.6∼3.6V
10µ
0.1µ
Speaker
2.2µ
+
0.1µ
SPK-Amp
220µ
+
+
220µ
16Ω
16Ω
HPR
HPL
RIN2
LIN2
RIN1
LIN1
MUTET
I2C
19
20
21
22
23
24
12
11
10
9
1µ
Headphone
PDN
AK4370VN
CSN
Top View
CCLK
CDTI
8
7
10
0.1µ
Analog Ground
Digital Ground
Audio Controller
µP
Notes:
- VSS1 and VSS2 of the AK4370 should be distributed separately from the ground of external controllers.
- All digital input pins (I2C, SDA/CDTI, SCL/CCLK, CAD0/CSN, SDATA, LRCK, BICK, MCKI, PDN) must
not be left floating.
- When the AK4370 is used in master mode, LRCK and BICK pins are floating before the M/S bit is changed to
“1”. Therefore, a 100kΩ pull-up resistor should be connected to the LRCK and BICK pins of the AK4370.
- When DVDD is supplied from AVDD via 10Ω series resistor, the capacitor larger than 0.1μF should not be
connected between DVDD and the ground.
Figure 38. Typical Connection Diagram (In case of AC coupling to MCKI)
MS0595-E-00
2007/03
- 46 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
