ASAHI KASEI
[AK4352]
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Ordering Guide
AK4352VT
AKD4352
-40
∼
+85°C
Evaluation Board
16pin TSSOP (0.65mm pitch)
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Pin Layout
MCLK
PD
BICK
SDATA
LRCK
DIF0
DIF1
DEM
1
2
3
4
5
6
7
8
16
15
14
CKS
VCML
AOUTL
AOUTR
VCMR
VREF
VDD
VSS
Top
View
13
12
11
10
9
PIN/FUNCTION
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin Name
MCLK
PD
BICK
SDATA
LRCK
DIF0
DIF1
DEM
VSS
VDD
VREF
VCMR
AOUTR
AOUTL
VCML
CKS
I/O
I
I
I
I
I
I
I
I
-
-
I
O
O
O
O
I
Function
Master Clock Pin
Power-Down Pin
When at “L”, the AK4352 is in power-down mode and is held in reset.
The AK4352 should always be reset upon power-up.
Serial Bit Input Clock Pin
This clock is used to latch audio data.
Audio Data Input Pin
L/R Clock Pin
This input determines which audio channel is currently being input on
SDATA
pin.
Digital Input Format Pin
These pins select one of four input modes.
De-emphasis Enable Pin
When at “H”, de-emphasis of fs=44.1kHz is enabled.
Ground Pin
Power Supply Pin
Reference Voltage Input Pin
Normally connected to VDD.
Rch Common Voltage Pin
Rch Analog Output Pin
Lch Analog Output Pin
Lch Common Voltage Pin
Master Clock Select Pin
“L”: 256fs “H”: 384fs
Note: All input pins should not be left floating.
M0040-E-02
-2-
2000/11
AKM [ ASAHI KASEI MICROSYSTEMS ]
