[AK4344]
OPERATION OVERVIEW
■ System Clock
The external clocks, which are required to operate the AK4344, are MCLK, BICK and LRCK. The master clock (MCLK)
should be synchronized with LRCK but the phase is not critical. The MCLK is used to operate the digital interpolation
filter and the delta-sigma modulator. The MCLK frequency is detected from the relation between MCLK and LRCK
automatically. The Half speed, the Normal speed and the Double speed mode are selected with the DFS1-0 bits (Table 1).
The sampling speed mode is set depending on the MCLK frequency automatically for Auto mode (DFS1 bit = DFS0 bit =
“1”) (Table 2).
The AK4344 is automatically placed in the reset mode when MCLK stops in the normal operation mode (PDN pin = “H”),
and the analog output becomes the VCOM voltage. After MCLK is input again, the AK4344 is powered up. After exiting
reset by PDN pin at power-up etc., the AK4344 is in the reset mode until MCLK and LRCK are input.
Mode
Normal Speed
Double Speed
Half Speed
Auto
DFS1
DFS0
fs
MCLK Frequency
256/384/512/768fs
128/192/256/384fs
512/768/1024/1536fs
Table 2
0
0
1
1
0
1
0
1
8 ∼ 48kHz
48 ∼ 96kHz
8 ∼ 24kHz
8 ∼ 96kHz
Table 1. System Clock Example
MCLK Frequency
512/768fs
128/192/256/384fs
1024/1536fs
Sampling Speed Mode
Normal Speed
Fs
8 ∼ 48kHz
48 ∼ 96kHz
8 ∼ 24kHz
Double Speed
Half Speed
Table 2. Auto Mode
■ Audio Interface Format
The Data is shifted in via the SDTI pin using BICK and LRCK inputs. The DIF1-0 bits as shown in Table 3 can select four
serial data modes. In all modes the serial data is MSB-first, 2’s compliment format and is latched on the rising edge of
BICK. Mode 3 can be used for 16bit I2S Compatible format by zeroing the unused LSBs at BICK ≥ 48fs or BICK = 32fs.
Mode
DIF1
DIF0
SDTI Format
16bit, LSB justified
24bit, LSB justified
24bit, MSB justified
16/24bit, I2S Compatible
BICK
≥ 32fs
≥ 48fs
Figure
0
1
2
3
0
0
1
1
0
1
0
1
Figure 10
Figure 11
Figure 12
Figure 13
≥ 48fs
≥ 48fs or 32fs
Table 3. Audio Interface Format
MS0641-E-01
2010/09
- 12 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
