[AK4183]
[Single READ mode]
Read operation begins with START condition followed by the address byte with R/W= “1”.The address matches the
AK4183 generates ACK. And after transmission of the address byte, the master receives upper 8bit A/D data first, and
generates ACK. The AK4183 transmits the remaining 4-bit A/D data and followed by 4-bit zero data (12bit mode).
Master device receives 8bit A/D data (8bit mode). The master then generates NACK and stop condition or repeated start
condition.
SDA
S
Address
A/D data
A/D data
P
Figure 11. Single A/D data Read Sequence (12-bit mode)
[Continuous Read mode]
This continuous read operation enables the higher sampling rate and lower processor load than a single read operation.
Because once control command is sent, it does not need to update control command on each read operation until
another control command would like to be rewritten.
A/D data A/D data
A/D data A/D data
Sr
SDA
S Address
Address
P
N
N+X
N+X
N
Repeat
Figure 12 Continuous A/D data Read Sequence
■ Power on Sequence
It is recommended that the control command must be sent to fix the internal register when power up. This initiates all registers
such as A2-0 bit, PD0 bit, and MODE bit. Once sending command to fix the internal register after first power up, the state of the
AK4183 is held on the known-condition of state to ensure that AK4183 is going into desire mode to realize lowest mode. A
command with PD0= “0” should be sent so that AK4183 will be set in the lowest power down mode.
MS0500-E-01
11
2008/12
AKM [ ASAHI KASEI MICROSYSTEMS ]
