[AK4161]
スイッチング特性
(特記なき場合は、Ta = -40C ~ 85C, VDD = 1.6V ~ 3.6V)
Parameter
Symbol
min
typ
max
Unit
Internal Oscillator
Fast Oscillator Period
FPRD
75
125
175
ns
Slow Osclillator Period
SPRD
21
32
43
us
Reset Timing
Reset Pulse Width (Note
tRW
10
-
-
us
Reset Pin Pulse Width of Spike Noise
tRS
0.5
-
-
us
Suppressed by Input Filter (Note
I2C
SCL clock frequency
f
SCL
-
-
400
kHz
Bus Free Time Between Transmissions
tBUF
1.3
-
-
us
Start Condition Hold Time (prior to first Clock pulse)
tHD:STA
0.6
-
-
us
Clock Low Time
tLOW
1.3
-
-
us
Clock High Time
tHIGH
0.6
-
-
us
Setup Time for Repeated Start Condition
tSU:STA
0.6
-
-
us
SDA Hold Time from SCL Falling (Note
tHD:DAT
0
-
-
us
SDA Setup Time from SCL Rising
tSU:DAT
0.1
-
-
us
Rise Time of Both SDA and SCL Lines
tR
-
-
0.3
us
Fall Time of Both SDA and SCL Lines
tF
-
-
0.3
us
Setup Time for Stop Condition
tSU:STO
0.6
-
-
us
Pulse Width of Spike Noise Suppressed By Input Filter
tSP
50
-
-
ns
Capacitive load on bus
Cb
-
-
400
pF
Note 15. RSTN pin= “L”でリセットされます。10us
以上のパルスを入力して下さい。
Note 16. RSTN pin
に内蔵されるノイズフィルタが除去できる
“L”パルスのスパイクノイズ幅を示しています。
Note 17.
データは最½
300ns (SCL
の立下り時間)の間保持されなければいけません。
tRW
tRS
50%VDD
RSTN
Figure 2. Reset Timing Diagram
SDA
tBUF
tLOW
tR
tHIGH
tF
tSP
VIH
VIL
SCL
tHD:STA
Stop
Start
tHD:DAT
tSU:DAT
tSU:STA
Start
tSU:STO
Stop
VIH
VIL
Figure 3. I2C Interface Timing Diagram
MS1450-J-02-PB
-8-
2012/12
AKM [ ASAHI KASEI MICROSYSTEMS ]
