[AK4141]
PIN/FUNCTION
Interrupt Pin
31
32
INT
O
I
Outputs “L” when PDN Pin = “L”.
Decoder Standard Preference Control for 6.5MHz carrier.
“L”: SECAM L NICAM
“H”: D/K1, D/K2, D/K3 or D/K NICAM
This Pin is internally ORed with A6M5 bit (default = “0”).
Master Mode Select Pin
A6M5
33
MSN
I
“L”: Slave mode if CKS[2:0] bits = “000”(default)
“H”: Master mode of MCLK = 256fs if CKS2 bit = “0”(default)
Chip Address 0 pin
Should match CAD0 bit in I2C first byte.
Chip Address 1 pin
34
35
CAD0
CAD1
I
I
Should match CAD1 bit in I2C first byte.
PLL Loop Filter 1 Pin
36
37
38
FILT1
VREFH
VREFL
O
O
O
A 4.7nF capacitor should be connected to GND3 externally.
Hi-Z when PDN Pin = “L”.
ADC Voltage Reference High Pin
A 0.1μF capacitor should be connected to GND3, and another 0.1μF capacitor
should be connected to VREFL Pin externally. Hi-Z when PDN Pin = “L”.
ADC Voltage Reference Low Pin
A 0.1μF capacitor should be connected to GND3 externally.
Hi-Z when PDN Pin = “L”.
39
40
GND3
SIF2
-
I
Ground Pin, 0V
Sound Intermediate Frequency(SIF) Input 2 Pin
ADC Common Voltage Output Pin.
A 1μF capacitor should be connected to GND3 externally. Hi-Z when PDN Pin =
“L”.
41
VCOM
O
42
43
44
45
SIF1
AVDD1
GND4
XTI
I
-
-
I
Sound Intermediate Frequency(SIF) Input 1 Pin
Analog Power Supply Pin, 3.0V~3.6V
Ground Pin, 0V
X'tal Input Pin
X'tal Output Pin.
46
XTO
O
Outputs “L” when PDN pin = “L”.
Ground Pin, 0V
Analog Power Supply Pin, 3.0V~3.6V
47
48
GND5
AVDD2
-
-
Note: All digital input pins should not be left floating.
Rev. 0.3-PB
2008/01
- 5 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
