[AK4141]
PIN/FUNCTION
No.
1
Pin Name
FILT2
I/O
O
Function
PLL Loop Filter 2 Pin
A 0.68μF capacitor should be connected to GND5 externally.
Hi-Z when PDN Pin = “L”.
Audio Data Format Select Pin. ORed with ODIF bit, ORed with IDIF0 bit.
“L”: 24bit Left justified if IDIF0 bit = “0”(default)
“H”: 24/16 bit IIS
2
IIS
I
3
4
5
6
7
LRCK5
SCLK5
SDTI5
LRCK4
SCLK4
I
I
I
I
I
Input Channel Clock 5 Pin
Audio Serial Data Clock 5 Pin
Audio Serial Data Input 5 Pin
Input Channel Clock 4 Pin
Audio Serial Data Clock 4 Pin
Audio Serial Data Input 4 Pin
Should be synchronized to LRCK and SCLK when SRC is not used.
Audio Serial Data Input 3 Pin
Audio Serial Data Input 2 Pin
Audio Serial Data Input 1 Pin
8
SDTI4
I
9
10
11
SDTI3
SDTI2
SDTI1
I
I
I
Decoder Standard Preference Control 0 Pin for 4.5MHz Carrier
This pin is internally XORed with A4M50 bit (default = “1”).
Decoder Standard Preference Control 1 Pin for 4.5MHz Carrier
This pin is internally XORed with A4M51 bit (default = “1”).
Control Data Clock Pin for I2C bus
12
A4M50
I
13
14
A4M51
SCL
I
I
Power-Down Mode & Reset Pin
15
PDN
I
When “L”, the AK4141 is powered-down, all registers are reset. And then all
digital output pins go “L”. The AK4141 must be reset once upon power-up.
Master Clock Input Pin
16
17
MCKI
TXIN
I
I
S/PDIF Input Pin
For through output. No Input Amplifier integrated.
Digital Power Supply Pin, 1.7V~1.9V
Ground Pin, 0V
18
19
20
21
22
DVDD
GND1
GND2
TVDD
SDA
-
-
-
Ground Pin, 0V
-
I/O Buffer Power Supply Pin, 1.7V~3.6V
Control Data Pin for I2C bus
I/O
Decoder Standard Preference Control 2 Pin for 4.5MHz Carrier
This pin is internally ORed with A4M52 bit (default = “0”).
S/PDIF Output pin. Outputs “L” when PDN Pin = “L”.
Master Clock Output Pin. Outputs “L” when PDN Pin = “L”.
Audio Serial Data Clock Pin.
23
A4M52
I
24
25
TXOUT
MCKO
O
O
26
27
SCLK
LRCK
I/O
I/O
Outputs “L” when PDN Pin = “L” and MSN Pin = “H”.
Hi-Z when PDN Pin = “L” and MSN Pin = “L”.
Input Channel Clock Pin
Outputs “L” when PDN Pin = “L” and MSN Pin = “H”.
Hi-Z when PDN Pin = “L” and MSN Pin = “L”.
Audio Serial Data Output 3 Pin
Outputs “L” when PDN Pin = “L”.
Audio Serial Data Output 2 Pin
Outputs “L” when PDN Pin = “L”.
Audio Serial Data Output 1 Pin
28
29
30
SDTO3
SDTO2
SDTO1
O
O
O
Outputs “L” when PDN Pin = “L”.
Rev. 0.3-PB
2008/01
- 4 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
