[AK4141]
SWITCHING CHARACTERISTICS (Continued)
(Ta=-20∼ 85°C; AVDD= 3.0~3.6V, DVDD=1.7~1.9V TVDD=1.7~3.6V; GND1=GND2=GND3=GND4=GND5=0V;
CL=20pF, Cb=400pF(SDA pin))
Parameter (Note 8)
Symbol
min
typ
max
Units
LRCK Timing (Slave Mode)
Normal mode (TDM=“0”)
LRCK Frequency
fs
Duty
32
45
48
55
kHz
%
Duty Cycle
TDM256 mode (TDM=“1”)
LRCK Frequency
fs
tLRH
tLRL
32
1/256fs
1/256fs
48
kHz
ns
ns
“H” time
“L” time
SRC Input
LRCK Frequency
Duty Cycle
fs
Duty
8
45
192
55
KHz
%
LRCK Timing (Master Mode)
Normal mode (TDM=“0”)
LRCK Frequency
fs
Duty
32
32
48
48
kHz
%
Duty Cycle
TDM256 mode (TDM=“1”)
LRCK Frequency
50
fs
tLRH
kHz
ns
“H” time
(Note 7)
1/8fs
Audio Interface Timing (Slave mode)
Normal mode (TDM=“0”)
SCLK Period
tBCK
tBCKL
tBCKH
tLRB
tBLR
tLRS
tBSD
tSDH
tSDS
160
65
65
30
30
ns
ns
ns
ns
ns
ns
ns
ns
ns
SCLK Pulse Width Low
Pulse Width High
LRCK Edge to SCLK “↑”
SCLK “↑” to LRCK Edge
(Note 9)
(Note 9)
LRCK to SDTO(MSB) (Except I2S mode)
SCLK “↓” to SDTO
35
35
SDTI Hold Time
SDTI Setup Time
10
10
TDM256 mode (TDM=“1”)
SCLK Period
SCLK Pulse Width Low
Pulse Width High
LRCK Edge to SCLK “↑”
SCLK “↑” to LRCK Edge
SCLK “↓” to SDTO
TDMIN Hold Time
TDMIN Setup Time
SRC Input (Note 10)
SCLK Period
SCLK Pulse Width Low
Pulse Width High
LRCK Edge to SCLK “↑”
SCLK “↑” to LRCK Edge
SDTI Hold Time
tBCK
tBCKL
tBCKH
tLRB
tBLR
tBSD
81
32
32
20
20
ns
ns
ns
ns
ns
ns
ns
ns
(Note 9)
(Note 9)
20
tSDH
tSDS
10
10
tBCK
tBCKL
tBCKH
tLRB
tBLR
tSDH
tSDS
81
32
32
20
20
10
10
ns
ns
ns
ns
ns
ns
ns
(Note 9)
(Note 9)
SDTI Setup Time
Rev. 0.3-PB
2008/01
- 11 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
