[AK4129]
OLRCK
OBICK
Bypass
SRC1
SRC2
SRC3
Input
Serial
Audio
I/F
IBICK1
ILRCK1
SDTI1
SMUTE
Dither
+
SDTO1
DEM
DEM
DEM
FIR
FIR
FIR
SRC
SRC
SRC
SRC
OBIT1
OBIT2
0.5 LSB
ODIF1
ODIF0
Bypass
Input
Serial
Audio
I/F
IBICK2
ILRCK2
SDTI2
SMUTE
Dither
Output
Serial
Audio
I/F
+
SDTO2
SDTO3
SRC
0.5 LSB
Bypass
Input
Serial
Audio
I/F
IBICK3
ILRCK3
SDTI3
SMUTE
Dither
+
SRC
0.5 LSB
Internal
OSC
IMCLK
PDN
PM1
PM2
UNLOCK
MCKO
Bypass
uP
I/F
X'tal
Osc
Clock
Div
Internal
Regulator
SRC
AVDD
VSS1
.
REF
CM2 CM1 CM0
SDA SCL
OMCLK/XTI
CAD0
XTO
VD18
SPB
Figure 1. AK4129 Block Diagram (Synchronous mode INAS pin = “L”)
OLRCK
OBICK
Bypass
Bypass
Bypass
SRC1
SRC2
SRC3
Input
Serial
Audio
I/F
BICK1
LRCK1
SDTI1
SMUTE
Dither
SDTO1
+
DEM
DEM
DEM
FIR
FIR
FIR
SRC
SRC
SRC
SRC
SRC
SRC
OBIT1
OBIT0
0.5LSB
ODIF1
ODIF0
Input
Serial
Audio
BICK2
LRCK2
SDTI2
SMUTE
Dither
Output
Serial
Audio
I/F
SDTO2
+
I/F
0.5LSB
Input
Serial
Audio
I/F
BICK3
LRCK3
SDTI3
SMUTE
Dither
SDTO3
+
0.5LSB
Internal
OSC
IMCLK
PDN
PM1
PM2
UNLOCK
MCKO
Bypass
uP
I/F
X'tal
Osc.
Clock
Div.
Internal
Regulator
SRC
AVDD
VSS1
REF
OMCLK/XTI CM2 CM1 CM0
XTO
SDA SCL
CAD0
VD18
SPB
Figure 2. AK4129 Block Diagram (Asynchronous mode INAS pin = “H”)
- 2 -
MS1173-E-01
2010/09
AKM [ ASAHI KASEI MICROSYSTEMS ]
