ASAHI KASEI
[AK4122]
1. Grounding and Power Supply Decoupling
The AK4122 requires careful attention to power supply and grounding arrangements. Alternatively if AVDD and DVDD
are supplied separately, the power up sequence is not critical. AVSS, BVSS and DVSS of the AK4122 must be
connected to analog ground plane. System analog ground and digital ground should be connected together near to where
the supplies are brought onto the printed circuit board. Decoupling capacitors should be as near to the AK4122 as possible,
with the small value ceramic capacitor being the nearest.
2. PLL Loop-Filter
The C1 (2.2µF) and R1 (470Ω) should be connected in series and attached between FILT pin and AVSS in parallel with C2
(2.2nF). Please be careful the noise onto the FILT pin.
AK4122
FILT
R1
C2
C1
AVSS
Parameter
Recommended value
Accuracy
R1
C1
C2
470Ω
2.2µF
2.2nF
−5% ∼ +5%
−50% ∼ +50%
−50% ∼ +50%
Note: The accuracy includes temperature dependence.
Figure 30. Loop Filter for SRC
The R2 (12kΩ) should be connected in series and attached between R pin and AVSS. Please be careful the noise onto the R
pin.
AK4122
R
R2
AVSS
Parameter
R2
Recommended value
Accuracy
12kΩ
−5% ∼ +5%
Note: The accuracy includes temperature dependence.
Figure 31. Loop Filter for DIR
MS0267-E-02
2004/07
- 50 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
