ASAHI KASEI
[AK4122]
Addr Register Name
07H Receiver Status 0
R/W
D7
UNLCK
RD
D6
PAR
RD
0
D5
AUTO
RD
D4
V
RD
0
D3
AUDN
RD
D2
STC
RD
0
D1
CINT
RD
0
D0
QINT
RD
0
Default
0
0
0
QINT: Q-subcode Buffer Interrupt
0 : No change
1 : Changed
This bit goes to “1” when Q-subcode stored in register addresses 13H to 1CH is updated.
CINT: Channel Status Buffer Interrupt
0 : No change
1 : Changed
This bit goes to “1” when C-bit stored in register addresses 0AH to 0EH changes.
STC: Sampling Frequency or Pre-emphasis Information Change Detection
0 : No detect
1 : Detect
This bit goes to “1” when either the FS3-0 or PEM bit changes.
AUDN: Audio Bit Output
0 : Audio
1 : Non audio
This bit is made by encoding channel status bits.
V: Validity Bit
0 : Valid
1 : Invalid
AUTO: Non-PCM or DTS-CD Bit Steam Auto Detection
0 : No detect
1 : Detect
This bit outputs the OR’ed value of NPCM and DTSCD bits.
PAR: Parity Error or Bi-phase Error Status
0 : No error
1 : Error
This bit goes to “1” if a parity error or biphase error is detected in the sub-frame.
UNLCK: PLL Lock Status
0 : Lock
1 : Unlock
QINT, CINT and STC bits are initialized when 07H is read.
MS0267-E-02
2004/07
- 43 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
