ASAHI KASEI
[AK4122]
Addr Register Name
04H INT0 Mask
R/W
D7
MULK0
R/W
0
D6
MPAR0
R/W
0
D5
MAUT0
R/W
1
D4
MV0
R/W
1
D3
MAUD0
R/W
D2
MSTC0
R/W
1
D1
MCIT0
R/W
1
D0
MQIT0
R/W
1
Default
1
MQIT0: Mask enable for QINT bit
0 : Mask disable
1 : Mask enable
MCIT0: Mask enable for CINT bit
0 : Mask disable
1 : Mask enable
MSTC0: Mask enable for STC bit
0 : Mask disable
1 : Mask enable
MAUD0: Mask enable for AUDN bit
0 : Mask disable
1 : Mask enable
MV0:
Mask enable for V bit
0 : Mask disable
1 : Mask enable
MAUT0: Mask enable for AUTO bit
0 : Mask disable
1 : Mask enable
MPAR0: Mask enable for PAR bit
0 : Mask disable
1 : Mask enable
MULK0: Mask enable for UNLCK bit
0 : Mask disable
1 : Mask enable
The factor which mask bit is set to “0” affects INT0 and INT2 pins operation.
MS0267-E-02
2004/07
- 40 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
