ASAHI KASEI
[AK4112A]
SYSTEM DESIGN
Figure 11 shows the example of system connection diagram for Serial Mode.
3.3V Supply
10u 0.1u
1
2
DVDD
DVSS
TVDD
28
27
26
CDTO
CDTI
+
Micro-
controller
3.3~5V Supply
3
CCLK
+
0.1u
10u
4
CSN 25
V/TX
XTI
C
5
24
23
22
21
20
19
18
17
16
15
MCKO1
MCKO2
DAUX
BICK
AK4112A
XTO
PDN
6
(Note 8)
C
7
18k
8
R
3.3V Supply
9
AVDD
AVSS
SDTO
LRCK
ERF
+
10u
10
0.1u
11 RX1
12 RX2
DSP
and
AD/DA
FS96
(see Figure 1,2)
13
14
RX3
RX4
P/SN
AUTO
Figure 11. Typical Connection Diagram (Serial Mode)
Notes:
- “C” depends on the crystal oscillator (Typ. 10-40pF)
- AVSS and DVSS must be connected the same ground plane
- Digital signals, especially clocks, should be kept away from the R pin in order to avoid an effect to the clock
jitter performance.
MS0020-E-00
2000/3
- 29 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
