ASAHI KASEI
[AK2572]
9.3.5 Sequential Read
Sequential Read operation is shown in Figure 9-6. After the data at the designated address is output by read
instruction, next address data can be read out if ACK signal is generated without stop bit signal that is sent
from a master controller
Figure 9-6 Sequential Read
. . . .
. . . .
SDA
1 0
0
0
0
1
A
C
K
R/
W
A
C
K
A
C
K
A
C
K
N
O
A
C
K
S
T
O
P
Device
Address-2
Data-1
(MSB First)
Data-2
Data-n
9.3.6 Data Change
Data Change timing chart is shown in Figure 9-7. Data change (SDA) is made while SCL is at “L”.
Figure 9-7 Data Change
SCL
SDA
DATA
DATA STABLE
CHANGE
9.3.7 Start / Stop
Start / Stop timing chart is shown in Figure 9-8. While SCL is at “H”, Start is effective by setting SDA from “H”
to “L”, and Stop is effective by setting SDA from “L” to “H”.
Figure 9-8 Start / Stop
SCL
SDA
START
STOP
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< MS0290-E-01>
2004/8
AKM [ ASAHI KASEI MICROSYSTEMS ]
