[AK2365]
10. Power-up Sequence
PDN (LDO)
1μs
700μs
1.8V
On-chip LDO
(1.8V operation)
The register can be written
RSTN
Internal register values are set.
Write to the register
Note) After PDN is set to “High”, registers remain undefined. In order to initialize them, RSTN is
set to “High”
11. System Reset
Parameter
Symbol Condition
Min.
1
Typ.
Max.
Unit
µs
Remarks
*1)
Hardware reset signal
input width
tRSTN
RSTN pin
SRST
register
Software reset
*2)
*1) After power-on, be sure to perform a hardware reset operation (register initialization). The
system is reset by a low pulse input of 1μs (min.) and enters the normal operation state. At this
moment, the digital (DI) pins are set as follows: RSTN pin to High, SCLK pin to Low, SDATA pin
to Low, CSN pin to Low.
tRSTN
VIH
RSTN
VIL
*2) When data 0x04:10101010 is written to the SRST[7:0] register, software reset is performed.
This setting initializes the registers and the operation mode is set to mode 2 (Standby 2).
After software reset is completed, this register comes to “0”.
MS1453-E-01
2012/10
- 11 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
