AT5510
Preliminary Product Information
120mA, Current Sinking,
10-bit I
2
C DAC for VCM Driver
Application Information
Power-down mode
AT5510 can be operated in power-down mode when PD pin is at high voltage level
(1.26V~VCC) or soft power-down enable. The PD bit (R15) of input register in serial
data can be written 1 to power down or 0 to enable AT5510.
Table 2: Power-down mode
PD = H
DATA BYTE
Bit 15 = 1
DATA BYTE
Bit 15 = 0
Power-down
Power-down
PD = L
Power-down
Power-up
Serial Interface Data Form
The AT5510 is controlled using I
2
C 2-wire serial protocol. Data can be written to or
read from the DAC at data rates up to 400KHz. The address byte consists of a 7-bit
address plus a read/write bit shown in Figure 5. The address of the AT5510 is 0001100.
The read/write bit is 0 if data is written to the AT5510, and 1 if data is read from the
AT5510.
The data byte has 16-bit shown in table 3, but not all bits of the input register data are
used. The Bit 15 is power-down function; Bit 14 is unused; Bit 13 to Bit 4 correspond
to the DAC data bits; Bit 3 to Bit 0 are unused.
The details about write and read operation are shown in Figure 5 and 6, respectively.
2F, No.10, Prosperity RD. II, Science-Based Industrial Park, Hsinchu 300,Taiwan, R.O.C.
Tel: 886-3-563-0878
Fax: 886-3-563-0879
WWW:
http://www.aimtron.com.tw
9/20/2007 REV:0.2
Email:
service@aimtron.com.tw
8
AIMTRON [ AIMTRON TECHNOLOGY ]
