AIC809/AIC810
ꢀPIN DESCRIPTIONS
GND Pin
RESET
: Ground.
Pin (AIC809) : Active low output pin.
threshold.
RESET
Output remains low while Vcc is below the reset
RESET Pin (AIC810) : Active high output pin. RESET output remains high while Vcc is below the reset
threshold.
Vcc Pin
: Supply voltage.
ꢀDETAIL DESCRIPTIONS OF TECHNICAL TERMS
internal timer is activated after VCC returns
RESET OUTPUT
RESET
above the reset threshold, and
low for the reset timeout period.
remains
μP will be activated at a valid reset state. These
μP supervisory circuits assert reset to prevent
code execution errors during power-up,
power-down, or brownout conditions.
BENEFITS OF HIGHLY ACCURATE RESET
THRESHOLD
RESET
AIC809/810 with specified voltage as 5V±10% or
3V±10% are ideal for systems using a 5V±5% or
3V±5% power supply. The reset is guaranteed to
is guaranteed to be a logic low for
VTH>VCC>0.9V. Once VCC exceeds the reset
RESET
threshold, an internal timer keeps
low
for the reset timeout period; after this interval,
RESET
assert after the power supply falls out of regulation,
but before power drops below the minimum
specified operating voltage range of the system
ICs. The pre-trimmed thresholds are reducing the
range over which an undesirable reset may occur.
goes high.
If a brownout condition occurs (VCC drops below
RESET
the reset threshold),
VCC goes below the reset threshold, the internal
RESET
goes low. Any time
timer resets to zero, and
goes low. The
ꢀAPPLICATION INFORMATION
below 0.9V. However in applications where
NEGATIVE-GOING VCC TRANSIENTS
In addition to issuing a reset to the μP during
RESET
must be valid down to 0V, adding a
RESET
pull-down resistor to
causes any leakage
RESET
power-up, power-down, and brownout conditions,
AIC809 series are relatively resistant to
short-duration negative-going VCC transient.
currents to flow to ground, holding
low.
INTERFACING TO μP WITH BIDIRECTIONAL
RESET PINS
ENSURING A VALID RESET OUTPUT DOWN
TO VCC=0
RESET
The
output on the AIC809N is open drain,
this device interfaces easily with μPs that have
bidirectional reset pins. Connecting the μ P
RESET
When VCC falls below 0.9V, AIC809
output no longer sinks current; it becomes an
open circuit. In this case, high-impedance CMOS
RESET
supervisor’s
microcontroller’s
resistor allows either device to assert reset.
output directly to the
RESET
pin with a single pull-up
RESET
logic inputs connecting to
can drift to
undetermined voltages. Therefore, AIC809/810
with CMOS is perfect for most applications of VCC
7
AIC [ ANALOG INTERGRATIONS CORPORATION ]
