Once the midpoint voltage has
been acquired, TCSET is then
forced to a 0, and the time con-
stant of the midpoint voltage
tracking circuit is increased by a
factor of 80. This effectively
freezes the midpoint voltage from
any variations due to normal data
transitions, but still allows for
some correction of frequency
drifts during the data burst.
The output of the data slicer
(DATOP) is a CMOS-compatible
bitstream. However, it is recom-
mended that an external NPN
amplifier stage be used to drive
the CMOS baseband processor, in
order to minimize the amount of
ground and supply currents in the
HPMX-5002 which might desensi-
tize the chip.
D: 1897.344 MHz
B: 1881.792 MHz
CERAMIC
TX PA TX FILTER
0: 893.376 MHz Rx
896.832 MHz Tx
9: 885.600 MHz Rx
889.056 MHz Tx
10.368 MHz
X2
Tank
φ
÷N
Freq.
÷12
Det.
T/R
FRONT-END
RF FILTER
RX LNA CERAMIC
IMAGE
FILTER
HPMX-5001
REFERENCE
OSCILLATOR
32/33
IF2 = 6.912 MHz
IF1 = 110.592 MHz
LC Filter
SAW Channel Filter
LC filter
Quad.
Data
Network Filter
SYNTHESIZER
N=1034 -1025 INCL. /32,33 Rx
N=1038 -1029 INCL. /32,33 Tx
PFD FREQ. = 864 kHz
Data
Slicer
φ
Freq.
Det.
RSSI
÷9
Lock
Det.
HPMX-5002
PFD FREQ. = 1.152 MHz
RX DATA
÷9
Charge
Pump
RC filter
Tank
LO2 = 103.68 MHz
TX Data
Gaussian LPF
All other connections go to Burst Mode Controller, power source, or ground.
Figure 3. Typical HPMX-5002 Application with HPMX-5001 T/R Chip.
7-113
AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
