HDMP-1512 (Tx), Signal Definitions (cont’d.)
Symbol
Signal Name
I/O
Logic Type
Description
LZPWRON
Laser Power On
Pin [36]
Input
TTL
Used in conjunction with the dual loss of light
detectors and the OFC circuit to assure the system is
ready to power up the laser.
LZTC
Laser Timing Cap
Pin [27]
C
The capacitor connected to this pin will be pre-
charged at power-up. During operation, if the window
detector detects the laser bias to be out of range, this
capacitor will begin to discharge. If the condition lasts
long enough, the capacitor voltage will fall below the
fault level and the FAULT pin will go high. Nominal
fault level is <1.0 volts.
PPSEL
Ping-Pong Select
Pin [34]
Input
TTL
A high signal applied to this pin causes the transmitter
to clock the data in by alternating between data byte 0
on the rising edge of TBC and data byte 1 one half
clock cycle later. When this pin is low, both data bytes
are clocked in on the rising edge of TBC.
± SI
Laser External Serial
Input
Pins [11,12]
Input
H50
BLL
The signal on this pin is input directly to the internal
laser driver circuitry or the LOUT pin. This input is
selected with the proper setting of TS1, TS2 and
EWRAP (see Input/Output Select table).
± SO
Cable Serial Data
Output
Output
High speed data output port. See Input/Output Select
table to enable this output.
Pins [5,6]
SPDSEL
TBC
Serial Speed Select
Pin [67]
Input
Input
TTL
TTL
Sets the chip to operate at the serial data rate of 1062.5
Mbaud (high) or 531.25 Mbaud (low).
Transmit Byte Clock
Pin [73]
A 53.125 Mhz clock supplied by the host system. This
reference clock is multiplied by 10 or 20 to generate
the serial bit clock (531.25 MHz or 1062.5 MHz).
TS[1:2]
Input/Output Select
Input
Pins [75,76]
Input
Input
TTL
TTL
TS1 and TS2 work in conjunction with EWRAP to
specify active input and output ports.
TX[00.19]
Data Inputs
Pins [43:62]
Two, 10 bit, pre-encoded data bytes. Byte 0 is
comprised of bits TX[00:09] and byte 1 is comprised of
bits TX[10:19]. The serialized bit stream is
transmitted TX[00] through TX[09] then TX[10]
through TX[19].
VCC_A
Analog Supply
Pins [77, 78]
S
S
Provides a clean power source for the critical PLL
and high speed analog cells. Normally +5.0 volts.
VCC_HS1
High Speed Supply 1
Pin [7]
Provides a clean power source for the high speed
cells. Noise on this line should be minimized for best
performance. Normally +5.0 volts.
VCC_HS2
High Speed Supply 2
Pin [13]
S
Provides a clean power source for the high speed
cells. Noise on this line should be minimized for best
performance. Normally +5.0 volts.
VCC_LOG
VCC_LZ
Logic Power Supply
Pins [33,37,68,72]
S
S
S
Used for all internal PECL logic. Isolate from the
noisy TTL supply. Normally +5.0 volts.
Laser Power Supply
Pins [23,24]
Power supply for low speed laser driver circuitry.
Normally +5.0 volts.
VCC_LZ1
Laser Power Supply
Pin [16]
Power supply for all laser driver AC circuitry.
Normally +5.0 volts.
670
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