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HDMP-1024 参数 Datasheet PDF下载

HDMP-1024图片预览
型号: HDMP-1024
PDF下载: 下载PDF文件 查看货源
内容描述: 低成本的千兆速率发送/接收芯片组与TTL I / O的 [Low Cost Gigabit Rate Transmit/Receive Chip Set with TTL I/Os]
分类和应用: 电信集成电路电信电路
文件页数/大小: 40 页 / 316 K
品牌: AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
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Typical Applications
The HDMP-1022/1024 chipset
was designed for ease of use and
flexibility. This allows the
customer to tailor the use of this
product, through the configura-
tion of the link, based on his
specific system requirements and
application needs. Typical
applications range from backplane
and bus extension to digital video
transmission.
Low latency bus extension of a 16
or 20 bit wide data bus may be
achieved using the standard
duplex configuration (see Figure
1d). In full duplex, the HDMP-
1022/1024 chipset handles all of
the issues of link startup, main-
tenance, and simple error
detection.
If the bus width is 32 or 40 bits
wide, the HDMP-1022/1024
chipset is capable of sending the
large data frame as two separate
frame segments, as shown in
Figure 1b. In this mode, called
Double Frame Mode, the FLAG
bit is used by the transmitter and
receiver to indicate the first or
second frame segment
(Figure 19). The HDMP-1022/
1024 chipset in Double Frame
Mode may also be configured in
full duplex to achieve a 32/40 bit
wide bus extension.
For digital video transmission,
simplex links are more common.
The HDMP-1022/1024 chipset
can transmit 16 to 21 bits of
parallel data in standard or
broadcast simplex mode.
Additionally, 32 to 40 bit wide
data can be transmitted over a
single line (in Double Frame
Mode) or two parallel lines, as in
Figure 1c.
CLK
Tx
Rx
CLK
A) 16/20 BIT SIMPLEX TRANSMISSION
MUX
CLK
Tx
Rx
CLK
DEMUX
B) 32/40 BIT SIMPLEX TRANSMISSION
Tx
CLK
Rx
CLK
Tx
CLK
Rx
CLK
C) 32/40 BIT SIMPLEX TRANSMISSION
WITH HIGH CLOCK RATES
Tx
CLK
Rx
CLK
Rx
CLK
Tx
CLK
D) 16/20 BIT DUPLEX TRANSMISSION
Tx
CLK
Rx
CLK
Rx
CLK
Rx
CLK
E) SIMPLEX BROADCAST TRANSMISSION
Figure 1. Various Configurations Using the HDMP-1022/1024.
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