HCPL-4504 OPTION 060
(mW)
800
700
600
500
400
300
+HV
P
S
+
I
(mA)
S
HCPL-4504/0454
HCNW4504
8
7
6
2
3
LED 1
BASE/GATE
DRIVE CIRCUIT
Q1
OUT 1
(230)
200
5
100
0
0
25 50 75 100 125 150 175 200
+
HCPL-4504/0454
HCNW4504
T
– CASE TEMPERATURE – °C
S
8
7
6
HCNW4504
2
3
LED 2
1000
P
(mW)
S
900
800
700
600
500
400
300
200
BASE/GATE
DRIVE CIRCUIT
Q2
I
(mA)
S
OUT 2
5
–HV
Figure 16. Typical Power Inverter.
100
0
0
25
50 75 100 125 150 175
T
– CASE TEMPERATURE – °C
S
Figure 15. Thermal Derating Curve,
Dependence of Safety Limiting Valve
with Case Temperature per VDE 0884.
LED 1
OUT 1
Power Inverter Dead
Time and Propagation
Delay Specifications
t
PLH min
(t
–t )
PLH max PLH min
The HCPL-4504/0454 and
t
PLH max
HCNW4504 include a specifica-
tion intended to help designers
minimize “dead time” in their
power inverter designs. The new
“propagation delay difference”
specification (tPLH - tPHL) is useful
for determining not only how
much optocoupler switching delay
is needed to prevent “shoot-
through” current, but also for
determining the best achievable
worst-case dead time for a given
design.
TURN-ON DELAY
–t
(t
)
PLH max PLH min
LED 2
OUT 2
t
PHL min
(t
–t
)
PHL max PHL min
t
PHL max
MAXIMUM DEAD TIME
When inverter power transistors
switch (Q1 and Q2 in Figure 17),
it is essential that they never
Figure 17. LED Delay and Dead Time Diagram.
1-47