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ATF-511P8-TR1 参数 Datasheet PDF下载

ATF-511P8-TR1图片预览
型号: ATF-511P8-TR1
PDF下载: 下载PDF文件 查看货源
内容描述: 高线性度增强模式 [High Linearity Enhancement Mode]
分类和应用:
文件页数/大小: 16 页 / 140 K
品牌: AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
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ATF-511P8 Absolute Maximum Ratings[1]  
Notes:  
Absolute  
1. Operation of this device in excess of any one  
of these parameters may cause permanent  
damage.  
Symbol  
Parameter  
Units  
Maximum  
VDS  
VGS  
DrainSource Voltage[2]  
GateSource Voltage[2]  
Gate Drain Voltage[2]  
Drain Current[2]  
V
7
2. Assumes DC quiescent conditions.  
3. Board (package belly) temperatureTB is 25°C.  
Derate 30 mW/°C for TB > 50°C.  
4. With 10 Ohm series resistor in gate supply  
and 3:1 VSWR.  
V
-5 to 1  
VGD  
IDS  
V
-5 to 1  
A
1
5. Channel-to-board thermal resistance  
measured using 150°C Liquid Crystal  
Measurement method.  
IGS  
Gate Current  
mA  
W
46  
Pdiss  
Pin max.  
TCH  
Total Power Dissipation[3]  
RF Input Power[4]  
3
6. Device can safely handle +30dBm RF Input  
dBm  
°C  
+30  
Power provided I  
limited to 46mA. I at  
GS  
GS  
drive level is bias circuit dependent.  
Channel Temperature  
Storage Temperature  
Thermal Resistance[5]  
150  
P
1dB  
TSTG  
θch_b  
°C  
-65 to 150  
33  
°C/W  
Product Consistency Distribution Charts at 2 GHz, 4.5V, 200 mA[6,7]  
200  
160  
120  
80  
240  
200  
160  
120  
80  
1000  
900  
800  
700  
600  
500  
400  
300  
200  
100  
0.8 V  
0.7 V  
Cpk = 3.24  
Cpk = 1.66  
Stdev = 0.6  
Stdev = 0.15  
+3 Std  
-3 Std  
+3 Std  
-3 Std  
0.6 V  
0.5 V  
40  
40  
0
0
0
0
35  
38  
41  
OIP3 (dBm)  
44  
47  
28  
29  
30  
31  
2
4
6
8
P1dB (dBm)  
V
(V)  
DS  
Figure 2. OIP3  
LSL = 38.5, Nominal = 41.7.  
Figure 3. P1dB  
LSL = 28.5, Nominal = 30.  
Figure 1. Typical I-V Curves  
(V = 0.1 per step).  
gs  
150  
120  
90  
60  
30  
0
160  
120  
Cpk = 1.4  
Cpk = 3.03  
Stdev = 0.31  
Stdev = 1.85  
-3 Std  
+3 Std  
-3 Std  
+3 Std  
80  
40  
0
13  
14  
15  
16  
17  
52  
57  
62  
67  
72  
77  
82  
GAIN (dB)  
PAE (%)  
Figure 4. Gain  
LSL = 13.5, Nominal = 14.8, USL = 16.5.  
Figure 5. PAE  
LSL = 52, Nominal = 68.9.  
Notes:  
6. Distribution data sample size is 400 samples taken from 4 different wafers and 3 different lots.  
Future wafers allocated to this product may have nominal values anywhere between the upper and  
lower limits.  
7. Measurements are made on production test board, which represents a trade-off between optimal  
OIP3, P1dB and VSWR. Circuit losses have been de-embedded from actual measurements.  
2