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A316J 参数 Datasheet PDF下载

A316J图片预览
型号: A316J
PDF下载: 下载PDF文件 查看货源
内容描述: 2.0安培门驱动光电耦合器与集成( VCE)去饱和检测和故障状态反馈 [2.0 Amp Gate Drive Optocoupler with Integrated (Vce) Desaturation Detection and Fault Status Feedback]
分类和应用: 光电驱动
文件页数/大小: 34 页 / 619 K
品牌: AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
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System Considerations  
Propagation Delay Difference  
(PDD)  
transistor Q1 has just turned off  
when transistor Q2 turns on, as  
shown in Figure 80. The amount  
of delay necessary to achieve this  
condition is equal to the maxi-  
mum value of the propagation  
delay difference specification,  
time is equivalent to the  
difference between the maximum  
and minimum propagation delay  
difference specifications as  
shown in Figure 81. The  
maximum dead time for the  
HCPL-316J is 800 ns (= 400 ns -  
(-400 ns)) over an operating  
temperature range of -40°C to  
100°C.  
The HCPL-316J includes a  
Propagation Delay Difference  
(PDD) specification intended to  
help designers minimize “dead  
time” in their power inverter  
designs. Dead time is the time  
period during which both the  
high and low side power  
PDD  
, which is specified to be  
MAX  
400 ns over the operating  
temperature range of -40°C to  
100°C.  
Note that the propagation delays  
used to calculate PDD and dead  
time are taken at equal tempera-  
tures and test conditions since  
the optocouplers under consider-  
ation are typically mounted in  
close proximity to each other and  
are switching identical IGBTs.  
transistors (Q1 and Q2 in  
Delaying the HCPL-316J turn-on  
signals by the maximum  
Figure 62) are off. Any overlap in  
Q1 and Q2 conduction will result  
in large currents flowing through  
the power devices between the  
high and low voltage motor rails,  
a potentially catastrophic condi-  
tion that must be prevented.  
propagation delay difference  
ensures that the minimum dead  
time is zero, but it does not tell a  
designer what the maximum dead  
time will be. The maximum dead  
To minimize dead time in a given  
design, the turn-on of the  
V
IN+1  
HCPL-316J driving Q2 should be  
delayed (relative to the turn-off of  
the HCPL-316J driving Q1) so  
that under worst-case conditions,  
V
OUT1  
Q1 ON  
Q1 OFF  
Q2 ON  
Q2 OFF  
V
OUT2  
V
IN+1  
V
IN+2  
t
PHL  
MIN  
t
PHL  
V
OUT1  
Q1 ON  
MAX  
Q1 OFF  
Q2 ON  
t
PLH  
MIN  
t
PLH  
MAX  
= PDD*  
MAX  
MAX  
Q2 OFF  
(t  
t
PHL- PLH  
V
OUT2  
V
IN+2  
MAXIMUM DEAD TIME  
(DUE TO OPTOCOUPLERꢀ  
t
PHL  
MAX  
= (t  
= (t  
= PDD*  
- t  
- t  
PDD*  
ꢀ + (t  
- t  
PLH  
MIN  
t
PHL  
PHL  
PHL  
PLH  
PLH  
PLH  
MAX  
MAX  
MAX  
MIN  
MIN  
MAX  
MIN  
- t  
(t  
- t  
PLH  
MAX  
PHL  
MIN  
PDD* MAX = (t  
= t  
- t  
PLH  
MAX MIN  
PHL PLH  
PHL  
MAX  
MIN  
*PDD = PROPAGATION DELAY  
NOTE: FOR PDD CALCULATIONS THE PROPAGATION DELAYS  
ARE TAKEN AT THE SAME TEMPERATURE AND TEST CONDITIONS.  
*PDD = PROPAGATION DELAY DIFFERENCE  
NOTE: FOR DEAD TIME AND PDD CALCULATIONS ALL PROPAGATION  
DELAYS ARE TAKEN AT THE SAME TEMPERATURE AND TEST CONDITIONS.  
Figure 80. Minimum LED Skew for Zero Dead Time.  
Figure 81. Waveforms for Dead Time Calculation.  
For product information and a complete list of  
Agilent contacts and distributors, please go to  
our web site.  
www.agilent.com/semiconductors  
E-mail: SemiconductorSupport@agilent.com  
Data subject to change.  
Copyright © 2005 Agilent Technologies, Inc.  
Obsoletes 5989-0784EN  
March 1, 2005  
5989-2143EN  
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