T9000
Preliminary Data Sheet
November 2000
ISDN Network Termination Node (NTN) Device
Table of Contents
Page Contents
Contents
Page
1 Description................................................................1
2 Features ...................................................................1
3 Block Diagram ..........................................................6
4 Pin Information .........................................................7
5 Control Register Memory Space ............................15
6 Functional Modules ................................................17
6.1 80C32 Microcontroller Module (80C32 Block) ..17
6.2 Program Address Space...................................17
6.3 Data Address Space.........................................17
6.4 Timers...............................................................17
6.5 Interrupts...........................................................17
6.6 Interrupt Register Set........................................18
6.7 Clock Generator................................................21
6.8 Watchdog Timer................................................22
6.9 On-Circuit Emulation (ONCE) Mode.................23
6.10 Emulation........................................................23
6.11 Module I/O ......................................................23
6.12 Special Instructions for Using the Lucent
80C32 Block....................................................24
6.12.1 Port Configuration .....................................24
6.12.1.1 Ports 0 and 2 .......................................24
6.12.1.2 Port 1 ...................................................24
6.12.1.3 Port 3 ...................................................24
6.13 Serial Port Timing ...........................................25
6.14 External Program Memory Characteristics .....26
7 Transmission Superblock .......................................29
7.1 U-Interface Block (U Block)...............................29
7.2 S/T-Interface Block (S Block)............................29
7.3 Data Flow/Activation Control Module (DFAC)...30
7.3.1 EOC State Machine (EOCSM)....................30
7.3.2 Automatic EOC (AUTOEOC) Mode ............30
7.3.3 Manual EOC Mode......................................30
7.3.4 Data Flow Control........................................32
7.4 Microcontroller Access to Upstream and
10 GCI+ Interface Module ........................................ 69
10.1 TDM Mode (GCCF, GMODE[1:0] = 1x) ......... 69
10.2 GCI Modes (GCCF[GMODE(1:0)] = 0x) ........ 73
10.3 GCI-NT Mode (GCCF[GMODE(1:0)] = 00).... 73
10.3.1 GCI-SCIT Mode (GCCF,
GMODE[1:0] = 01) ..................................... 75
10.3.2 Monitor Message Transfer ....................... 77
10.4 C/I Message Transfer..................................... 77
10.5 GCI+ Powerdown Mode................................. 77
10.6 GCI+ Loopbacks ............................................ 78
10.7 GCI+ Register Set.......................................... 79
11 GPIO Ports .......................................................... 85
11.1 GPIO Register Set ......................................... 86
12 PWM Module....................................................... 93
12.1 PWM Manual/Timer Operation Mode............. 94
12.2 PWM Auto Operation (Sine) Mode................. 94
12.3 PWSM ROM................................................... 96
12.4 PWM Auto Mode Example............................. 97
12.5 PWM Powerdown Mode............................... 100
12.6 PWM Module Register Set........................... 100
13 dc/dc Control Generator .................................... 104
13.1 dc/dc Control Generator Register Set.......... 104
14 Comparators...................................................... 105
14.1 Comparators Register Set............................ 106
14.2 Configuration Sequence .............................. 107
15 Test Mode.......................................................... 108
16 Loopbacks ......................................................... 109
17 Absolute Maximum Ratings............................... 110
18 Handling Precautions ........................................ 110
19 Recommended Operating Conditions ............... 110
20 Electrical Characteristics ....................................111
20.1 Power Supply................................................111
20.2 Power Consumption..................................... 111
20.3 S/T-Interface Receiver Common-Mode
Downstream B1 and B2 Channels....................32
7.5 LT Mode............................................................32
7.6 DFAC Register Set ...........................................33
8 Device Operation Control .......................................47
8.1 Device Operation Register................................47
9 HDLC with FIFO Module ........................................52
9.1 HDLC Transmitter.............................................52
9.1.1 HDLC Transmitter Initialization....................52
9.2 HDLC Transmitter D-Channel Access ..............53
9.3 HDLC Receiver.................................................54
9.3.1 HDLC Receiver Initialization........................54
9.3.1.1 Overrun Condition..................................56
9.4 Address Recognition.........................................56
9.5 HDLC Register Set ...........................................58
Rejection...................................................... 111
20.4 Pin Electrical Characteristics........................ 112
21 Crystal Characteristics....................................... 113
22 Timing Characteristics....................................... 113
23 Application Diagrams......................................... 114
24 Outline Diagram................................................. 116
24.1 100-Pin TQFP .............................................. 116
25 Ordering Information.......................................... 117
26 Register Set Summary ...................................... 118
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Lucent Technologies Inc.
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